1 /* 2 * Copyright (C) 2010 Samsung Electronics 3 * Minkyu Kang <mk7.kang@samsung.com> 4 * Kyungmin Park <kyungmin.park@samsung.com> 5 * 6 * See file CREDITS for list of people who contributed to this 7 * project. 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * MA 02111-1307 USA 23 */ 24 25 #include <common.h> 26 #include <asm/io.h> 27 #include <asm/arch/adc.h> 28 #include <asm/arch/gpio.h> 29 #include <asm/arch/mmc.h> 30 #include <pmic.h> 31 32 DECLARE_GLOBAL_DATA_PTR; 33 34 struct exynos4_gpio_part1 *gpio1; 35 struct exynos4_gpio_part2 *gpio2; 36 unsigned int board_rev; 37 38 u32 get_board_rev(void) 39 { 40 return board_rev; 41 } 42 43 static int get_hwrev(void) 44 { 45 return board_rev & 0xFF; 46 } 47 48 static void check_hw_revision(void); 49 50 int board_init(void) 51 { 52 gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE; 53 gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE; 54 55 gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210; 56 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; 57 58 check_hw_revision(); 59 printf("HW Revision:\t0x%x\n", board_rev); 60 61 #if defined(CONFIG_PMIC) 62 pmic_init(); 63 #endif 64 65 return 0; 66 } 67 68 int dram_init(void) 69 { 70 gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) + 71 get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE); 72 73 return 0; 74 } 75 76 void dram_init_banksize(void) 77 { 78 gd->bd->bi_dram[0].start = PHYS_SDRAM_1; 79 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; 80 gd->bd->bi_dram[1].start = PHYS_SDRAM_2; 81 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; 82 } 83 84 static unsigned short get_adc_value(int channel) 85 { 86 struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc(); 87 unsigned short ret = 0; 88 unsigned int reg; 89 unsigned int loop = 0; 90 91 writel(channel & 0xF, &adc->adcmux); 92 writel((1 << 14) | (49 << 6), &adc->adccon); 93 writel(1000 & 0xffff, &adc->adcdly); 94 writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */ 95 udelay(10); 96 writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */ 97 udelay(10); 98 99 do { 100 udelay(1); 101 reg = readl(&adc->adccon); 102 } while (!(reg & (1 << 15)) && (loop++ < 1000)); 103 104 ret = readl(&adc->adcdat0) & 0xFFF; 105 106 return ret; 107 } 108 109 static unsigned int get_hw_revision(void) 110 { 111 int hwrev, mode0, mode1; 112 113 mode0 = get_adc_value(1); /* HWREV_MODE0 */ 114 mode1 = get_adc_value(2); /* HWREV_MODE1 */ 115 116 /* 117 * XXX Always set the default hwrev as the latest board 118 * ADC = (voltage) / 3.3 * 4096 119 */ 120 hwrev = 3; 121 122 #define IS_RANGE(x, min, max) ((x) > (min) && (x) < (max)) 123 if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200)) 124 hwrev = 0x0; /* 0.01V 0.01V */ 125 if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200)) 126 hwrev = 0x1; /* 610mV 0.01V */ 127 if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200)) 128 hwrev = 0x2; /* 1.16V 0.01V */ 129 if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200)) 130 hwrev = 0x3; /* 1.79V 0.01V */ 131 #undef IS_RANGE 132 133 debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev); 134 135 return hwrev; 136 } 137 138 static void check_hw_revision(void) 139 { 140 int hwrev; 141 142 hwrev = get_hw_revision(); 143 144 board_rev |= hwrev; 145 } 146 147 #ifdef CONFIG_DISPLAY_BOARDINFO 148 int checkboard(void) 149 { 150 puts("Board:\tUniversal C210\n"); 151 return 0; 152 } 153 #endif 154 155 #ifdef CONFIG_GENERIC_MMC 156 int board_mmc_init(bd_t *bis) 157 { 158 int i, err; 159 160 switch (get_hwrev()) { 161 case 0: 162 /* 163 * Set the low to enable LDO_EN 164 * But when you use the test board for eMMC booting 165 * you should set it HIGH since it removes the inverter 166 */ 167 /* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */ 168 s5p_gpio_direction_output(&gpio1->e3, 6, 0); 169 break; 170 default: 171 /* 172 * Default reset state is High and there's no inverter 173 * But set it as HIGH to ensure 174 */ 175 /* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */ 176 s5p_gpio_direction_output(&gpio1->e1, 3, 1); 177 break; 178 } 179 180 /* 181 * eMMC GPIO: 182 * SDR 8-bit@48MHz at MMC0 183 * GPK0[0] SD_0_CLK(2) 184 * GPK0[1] SD_0_CMD(2) 185 * GPK0[2] SD_0_CDn -> Not used 186 * GPK0[3:6] SD_0_DATA[0:3](2) 187 * GPK1[3:6] SD_0_DATA[0:3](3) 188 * 189 * DDR 4-bit@26MHz at MMC4 190 * GPK0[0] SD_4_CLK(3) 191 * GPK0[1] SD_4_CMD(3) 192 * GPK0[2] SD_4_CDn -> Not used 193 * GPK0[3:6] SD_4_DATA[0:3](3) 194 * GPK1[3:6] SD_4_DATA[4:7](4) 195 */ 196 for (i = 0; i < 7; i++) { 197 if (i == 2) 198 continue; 199 /* GPK0[0:6] special function 2 */ 200 s5p_gpio_cfg_pin(&gpio2->k0, i, 0x2); 201 /* GPK0[0:6] pull disable */ 202 s5p_gpio_set_pull(&gpio2->k0, i, GPIO_PULL_NONE); 203 /* GPK0[0:6] drv 4x */ 204 s5p_gpio_set_drv(&gpio2->k0, i, GPIO_DRV_4X); 205 } 206 207 for (i = 3; i < 7; i++) { 208 /* GPK1[3:6] special function 3 */ 209 s5p_gpio_cfg_pin(&gpio2->k1, i, 0x3); 210 /* GPK1[3:6] pull disable */ 211 s5p_gpio_set_pull(&gpio2->k1, i, GPIO_PULL_NONE); 212 /* GPK1[3:6] drv 4x */ 213 s5p_gpio_set_drv(&gpio2->k1, i, GPIO_DRV_4X); 214 } 215 216 /* T-flash detect */ 217 s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf); 218 s5p_gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP); 219 220 /* 221 * MMC device init 222 * mmc0 : eMMC (8-bit buswidth) 223 * mmc2 : SD card (4-bit buswidth) 224 */ 225 err = s5p_mmc_init(0, 8); 226 227 /* 228 * Check the T-flash detect pin 229 * GPX3[4] T-flash detect pin 230 */ 231 if (!s5p_gpio_get_value(&gpio2->x3, 4)) { 232 /* 233 * SD card GPIO: 234 * GPK2[0] SD_2_CLK(2) 235 * GPK2[1] SD_2_CMD(2) 236 * GPK2[2] SD_2_CDn -> Not used 237 * GPK2[3:6] SD_2_DATA[0:3](2) 238 */ 239 for (i = 0; i < 7; i++) { 240 if (i == 2) 241 continue; 242 /* GPK2[0:6] special function 2 */ 243 s5p_gpio_cfg_pin(&gpio2->k2, i, 0x2); 244 /* GPK2[0:6] pull disable */ 245 s5p_gpio_set_pull(&gpio2->k2, i, GPIO_PULL_NONE); 246 /* GPK2[0:6] drv 4x */ 247 s5p_gpio_set_drv(&gpio2->k2, i, GPIO_DRV_4X); 248 } 249 err = s5p_mmc_init(2, 4); 250 } 251 252 return err; 253 254 } 255 #endif 256