1 /*
2  *  Copyright (C) 2010 Samsung Electronics
3  *  Minkyu Kang <mk7.kang@samsung.com>
4  *  Kyungmin Park <kyungmin.park@samsung.com>
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #include <common.h>
10 #include <spi.h>
11 #include <lcd.h>
12 #include <asm/io.h>
13 #include <asm/gpio.h>
14 #include <asm/arch/adc.h>
15 #include <asm/arch/gpio.h>
16 #include <asm/arch/pinmux.h>
17 #include <asm/arch/watchdog.h>
18 #include <ld9040.h>
19 #include <power/pmic.h>
20 #include <usb.h>
21 #include <usb/s3c_udc.h>
22 #include <asm/arch/cpu.h>
23 #include <power/max8998_pmic.h>
24 #include <libtizen.h>
25 #include <samsung/misc.h>
26 #include <usb_mass_storage.h>
27 
28 DECLARE_GLOBAL_DATA_PTR;
29 
30 struct exynos4_gpio_part1 *gpio1;
31 struct exynos4_gpio_part2 *gpio2;
32 unsigned int board_rev;
33 
34 u32 get_board_rev(void)
35 {
36 	return board_rev;
37 }
38 
39 static int get_hwrev(void)
40 {
41 	return board_rev & 0xFF;
42 }
43 
44 static void init_pmic_lcd(void);
45 
46 int exynos_power_init(void)
47 {
48 	int ret;
49 
50 	/*
51 	 * For PMIC the I2C bus is named as I2C5, but it is connected
52 	 * to logical I2C adapter 0
53 	 */
54 	ret = pmic_init(I2C_0);
55 	if (ret)
56 		return ret;
57 
58 	init_pmic_lcd();
59 
60 	return 0;
61 }
62 
63 static unsigned short get_adc_value(int channel)
64 {
65 	struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc();
66 	unsigned short ret = 0;
67 	unsigned int reg;
68 	unsigned int loop = 0;
69 
70 	writel(channel & 0xF, &adc->adcmux);
71 	writel((1 << 14) | (49 << 6), &adc->adccon);
72 	writel(1000 & 0xffff, &adc->adcdly);
73 	writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */
74 	udelay(10);
75 	writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */
76 	udelay(10);
77 
78 	do {
79 		udelay(1);
80 		reg = readl(&adc->adccon);
81 	} while (!(reg & (1 << 15)) && (loop++ < 1000));
82 
83 	ret = readl(&adc->adcdat0) & 0xFFF;
84 
85 	return ret;
86 }
87 
88 static int adc_power_control(int on)
89 {
90 	int ret;
91 	struct pmic *p = pmic_get("MAX8998_PMIC");
92 	if (!p)
93 		return -ENODEV;
94 
95 	if (pmic_probe(p))
96 		return -1;
97 
98 	ret = pmic_set_output(p,
99 			      MAX8998_REG_ONOFF1,
100 			      MAX8998_LDO4, !!on);
101 
102 	return ret;
103 }
104 
105 static unsigned int get_hw_revision(void)
106 {
107 	int hwrev, mode0, mode1;
108 
109 	adc_power_control(1);
110 
111 	mode0 = get_adc_value(1);		/* HWREV_MODE0 */
112 	mode1 = get_adc_value(2);		/* HWREV_MODE1 */
113 
114 	/*
115 	 * XXX Always set the default hwrev as the latest board
116 	 * ADC = (voltage) / 3.3 * 4096
117 	 */
118 	hwrev = 3;
119 
120 #define IS_RANGE(x, min, max)	((x) > (min) && (x) < (max))
121 	if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200))
122 		hwrev = 0x0;		/* 0.01V	0.01V */
123 	if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200))
124 		hwrev = 0x1;		/* 610mV	0.01V */
125 	if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200))
126 		hwrev = 0x2;		/* 1.16V	0.01V */
127 	if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200))
128 		hwrev = 0x3;		/* 1.79V	0.01V */
129 #undef IS_RANGE
130 
131 	debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev);
132 
133 	adc_power_control(0);
134 
135 	return hwrev;
136 }
137 
138 static void check_hw_revision(void)
139 {
140 	int hwrev;
141 
142 	hwrev = get_hw_revision();
143 
144 	board_rev |= hwrev;
145 }
146 
147 #ifdef CONFIG_USB_GADGET
148 static int s5pc210_phy_control(int on)
149 {
150 	int ret = 0;
151 	struct pmic *p = pmic_get("MAX8998_PMIC");
152 	if (!p)
153 		return -ENODEV;
154 
155 	if (pmic_probe(p))
156 		return -1;
157 
158 	if (on) {
159 		ret |= pmic_set_output(p,
160 				       MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
161 				       MAX8998_SAFEOUT1, LDO_ON);
162 		ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
163 				      MAX8998_LDO3, LDO_ON);
164 		ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
165 				      MAX8998_LDO8, LDO_ON);
166 
167 	} else {
168 		ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
169 				      MAX8998_LDO8, LDO_OFF);
170 		ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
171 				      MAX8998_LDO3, LDO_OFF);
172 		ret |= pmic_set_output(p,
173 				       MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
174 				       MAX8998_SAFEOUT1, LDO_OFF);
175 	}
176 
177 	if (ret) {
178 		puts("MAX8998 LDO setting error!\n");
179 		return -1;
180 	}
181 
182 	return 0;
183 }
184 
185 struct s3c_plat_otg_data s5pc210_otg_data = {
186 	.phy_control = s5pc210_phy_control,
187 	.regs_phy = EXYNOS4_USBPHY_BASE,
188 	.regs_otg = EXYNOS4_USBOTG_BASE,
189 	.usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL,
190 	.usb_flags = PHY0_SLEEP,
191 };
192 #endif
193 
194 int board_usb_init(int index, enum usb_init_type init)
195 {
196 	debug("USB_udc_probe\n");
197 	return s3c_udc_probe(&s5pc210_otg_data);
198 }
199 
200 #ifdef CONFIG_USB_CABLE_CHECK
201 int usb_cable_connected(void)
202 {
203 	return 0;
204 }
205 #endif
206 
207 int exynos_early_init_f(void)
208 {
209 	wdt_stop();
210 
211 	return 0;
212 }
213 
214 #ifdef CONFIG_SOFT_SPI
215 static void soft_spi_init(void)
216 {
217 	gpio_direction_output(CONFIG_SOFT_SPI_GPIO_SCLK,
218 		CONFIG_SOFT_SPI_MODE & SPI_CPOL);
219 	gpio_direction_output(CONFIG_SOFT_SPI_GPIO_MOSI, 1);
220 	gpio_direction_input(CONFIG_SOFT_SPI_GPIO_MISO);
221 	gpio_direction_output(CONFIG_SOFT_SPI_GPIO_CS,
222 		!(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
223 }
224 
225 void spi_cs_activate(struct spi_slave *slave)
226 {
227 	gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
228 		!(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
229 	SPI_SCL(1);
230 	gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
231 		CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH);
232 }
233 
234 void spi_cs_deactivate(struct spi_slave *slave)
235 {
236 	gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
237 		!(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
238 }
239 
240 int  spi_cs_is_valid(unsigned int bus, unsigned int cs)
241 {
242 	return bus == 0 && cs == 0;
243 }
244 
245 void universal_spi_scl(int bit)
246 {
247 	gpio_set_value(CONFIG_SOFT_SPI_GPIO_SCLK, bit);
248 }
249 
250 void universal_spi_sda(int bit)
251 {
252 	gpio_set_value(CONFIG_SOFT_SPI_GPIO_MOSI, bit);
253 }
254 
255 int universal_spi_read(void)
256 {
257 	return gpio_get_value(CONFIG_SOFT_SPI_GPIO_MISO);
258 }
259 #endif
260 
261 static void init_pmic_lcd(void)
262 {
263 	unsigned char val;
264 	int ret = 0;
265 
266 	struct pmic *p = pmic_get("MAX8998_PMIC");
267 
268 	if (!p)
269 		return;
270 
271 	if (pmic_probe(p))
272 		return;
273 
274 	/* LDO7 1.8V */
275 	val = 0x02; /* (1800 - 1600) / 100; */
276 	ret |= pmic_reg_write(p,  MAX8998_REG_LDO7, val);
277 
278 	/* LDO17 3.0V */
279 	val = 0xe; /* (3000 - 1600) / 100; */
280 	ret |= pmic_reg_write(p,  MAX8998_REG_LDO17, val);
281 
282 	/* Disable unneeded regulators */
283 	/*
284 	 * ONOFF1
285 	 * Buck1 ON, Buck2 OFF, Buck3 ON, Buck4 ON
286 	 * LDO2 ON, LDO3 OFF, LDO4 OFF, LDO5 ON
287 	 */
288 	val = 0xB9;
289 	ret |= pmic_reg_write(p,  MAX8998_REG_ONOFF1, val);
290 
291 	/* ONOFF2
292 	 * LDO6 OFF, LDO7 ON, LDO8 OFF, LDO9 ON,
293 	 * LDO10 OFF, LDO11 OFF, LDO12 OFF, LDO13 OFF
294 	 */
295 	val = 0x50;
296 	ret |= pmic_reg_write(p,  MAX8998_REG_ONOFF2, val);
297 
298 	/* ONOFF3
299 	 * LDO14 OFF, LDO15 OFF, LGO16 OFF, LDO17 OFF
300 	 * EPWRHOLD OFF, EBATTMON OFF, ELBCNFG2 OFF, ELBCNFG1 OFF
301 	 */
302 	val = 0x00;
303 	ret |= pmic_reg_write(p,  MAX8998_REG_ONOFF3, val);
304 
305 	if (ret)
306 		puts("LCD pmic initialisation error!\n");
307 }
308 
309 void exynos_cfg_lcd_gpio(void)
310 {
311 	unsigned int i, f3_end = 4;
312 
313 	for (i = 0; i < 8; i++) {
314 		/* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */
315 		s5p_gpio_cfg_pin(&gpio1->f0, i, GPIO_FUNC(2));
316 		s5p_gpio_cfg_pin(&gpio1->f1, i, GPIO_FUNC(2));
317 		s5p_gpio_cfg_pin(&gpio1->f2, i, GPIO_FUNC(2));
318 		/* pull-up/down disable */
319 		s5p_gpio_set_pull(&gpio1->f0, i, GPIO_PULL_NONE);
320 		s5p_gpio_set_pull(&gpio1->f1, i, GPIO_PULL_NONE);
321 		s5p_gpio_set_pull(&gpio1->f2, i, GPIO_PULL_NONE);
322 
323 		/* drive strength to max (24bit) */
324 		s5p_gpio_set_drv(&gpio1->f0, i, GPIO_DRV_4X);
325 		s5p_gpio_set_rate(&gpio1->f0, i, GPIO_DRV_SLOW);
326 		s5p_gpio_set_drv(&gpio1->f1, i, GPIO_DRV_4X);
327 		s5p_gpio_set_rate(&gpio1->f1, i, GPIO_DRV_SLOW);
328 		s5p_gpio_set_drv(&gpio1->f2, i, GPIO_DRV_4X);
329 		s5p_gpio_set_rate(&gpio1->f0, i, GPIO_DRV_SLOW);
330 	}
331 
332 	for (i = 0; i < f3_end; i++) {
333 		/* set GPF3[0:3] for RGB Interface and Data lines (32bit) */
334 		s5p_gpio_cfg_pin(&gpio1->f3, i, GPIO_FUNC(2));
335 		/* pull-up/down disable */
336 		s5p_gpio_set_pull(&gpio1->f3, i, GPIO_PULL_NONE);
337 		/* drive strength to max (24bit) */
338 		s5p_gpio_set_drv(&gpio1->f3, i, GPIO_DRV_4X);
339 		s5p_gpio_set_rate(&gpio1->f3, i, GPIO_DRV_SLOW);
340 	}
341 
342 	/* gpio pad configuration for LCD reset. */
343 	s5p_gpio_cfg_pin(&gpio2->y4, 5, GPIO_OUTPUT);
344 
345 	spi_init();
346 }
347 
348 int mipi_power(void)
349 {
350 	return 0;
351 }
352 
353 void exynos_reset_lcd(void)
354 {
355 	s5p_gpio_set_value(&gpio2->y4, 5, 1);
356 	udelay(10000);
357 	s5p_gpio_set_value(&gpio2->y4, 5, 0);
358 	udelay(10000);
359 	s5p_gpio_set_value(&gpio2->y4, 5, 1);
360 	udelay(100);
361 }
362 
363 void exynos_lcd_power_on(void)
364 {
365 	struct pmic *p = pmic_get("MAX8998_PMIC");
366 
367 	if (!p)
368 		return;
369 
370 	if (pmic_probe(p))
371 		return;
372 
373 	pmic_set_output(p, MAX8998_REG_ONOFF3, MAX8998_LDO17, LDO_ON);
374 	pmic_set_output(p, MAX8998_REG_ONOFF2, MAX8998_LDO7, LDO_ON);
375 }
376 
377 void exynos_cfg_ldo(void)
378 {
379 	ld9040_cfg_ldo();
380 }
381 
382 void exynos_enable_ldo(unsigned int onoff)
383 {
384 	ld9040_enable_ldo(onoff);
385 }
386 
387 int exynos_init(void)
388 {
389 	gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE;
390 	gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE;
391 
392 	gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
393 
394 	switch (get_hwrev()) {
395 	case 0:
396 		/*
397 		 * Set the low to enable LDO_EN
398 		 * But when you use the test board for eMMC booting
399 		 * you should set it HIGH since it removes the inverter
400 		 */
401 		/* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
402 		s5p_gpio_direction_output(&gpio1->e3, 6, 0);
403 		break;
404 	default:
405 		/*
406 		 * Default reset state is High and there's no inverter
407 		 * But set it as HIGH to ensure
408 		 */
409 		/* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
410 		s5p_gpio_direction_output(&gpio1->e1, 3, 1);
411 		break;
412 	}
413 
414 #ifdef CONFIG_SOFT_SPI
415 	soft_spi_init();
416 #endif
417 	check_hw_revision();
418 	printf("HW Revision:\t0x%x\n", board_rev);
419 
420 	return 0;
421 }
422 
423 void exynos_lcd_misc_init(vidinfo_t *vid)
424 {
425 #ifdef CONFIG_TIZEN
426 	get_tizen_logo_info(vid);
427 #endif
428 
429 	/* for LD9040. */
430 	vid->pclk_name = 1;	/* MPLL */
431 	vid->sclk_div = 1;
432 
433 	setenv("lcdinfo", "lcd=ld9040");
434 }
435