1 /* 2 * Copyright (C) 2010 Samsung Electronics 3 * Minkyu Kang <mk7.kang@samsung.com> 4 * Kyungmin Park <kyungmin.park@samsung.com> 5 * 6 * See file CREDITS for list of people who contributed to this 7 * project. 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * MA 02111-1307 USA 23 */ 24 25 #include <common.h> 26 #include <asm/io.h> 27 #include <asm/arch/adc.h> 28 #include <asm/arch/gpio.h> 29 #include <asm/arch/mmc.h> 30 31 DECLARE_GLOBAL_DATA_PTR; 32 33 struct s5pc210_gpio_part1 *gpio1; 34 struct s5pc210_gpio_part2 *gpio2; 35 unsigned int board_rev; 36 37 u32 get_board_rev(void) 38 { 39 return board_rev; 40 } 41 42 static int get_hwrev(void) 43 { 44 return board_rev & 0xFF; 45 } 46 47 static void check_hw_revision(void); 48 49 int board_init(void) 50 { 51 gpio1 = (struct s5pc210_gpio_part1 *) S5PC210_GPIO_PART1_BASE; 52 gpio2 = (struct s5pc210_gpio_part2 *) S5PC210_GPIO_PART2_BASE; 53 54 gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210; 55 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; 56 57 check_hw_revision(); 58 printf("HW Revision:\t0x%x\n", board_rev); 59 60 return 0; 61 } 62 63 int dram_init(void) 64 { 65 gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) + 66 get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE); 67 68 return 0; 69 } 70 71 void dram_init_banksize(void) 72 { 73 gd->bd->bi_dram[0].start = PHYS_SDRAM_1; 74 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; 75 gd->bd->bi_dram[1].start = PHYS_SDRAM_2; 76 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; 77 } 78 79 static unsigned short get_adc_value(int channel) 80 { 81 struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc(); 82 unsigned short ret = 0; 83 unsigned int reg; 84 unsigned int loop = 0; 85 86 writel(channel & 0xF, &adc->adcmux); 87 writel((1 << 14) | (49 << 6), &adc->adccon); 88 writel(1000 & 0xffff, &adc->adcdly); 89 writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */ 90 udelay(10); 91 writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */ 92 udelay(10); 93 94 do { 95 udelay(1); 96 reg = readl(&adc->adccon); 97 } while (!(reg & (1 << 15)) && (loop++ < 1000)); 98 99 ret = readl(&adc->adcdat0) & 0xFFF; 100 101 return ret; 102 } 103 104 static unsigned int get_hw_revision(void) 105 { 106 int hwrev, mode0, mode1; 107 108 mode0 = get_adc_value(1); /* HWREV_MODE0 */ 109 mode1 = get_adc_value(2); /* HWREV_MODE1 */ 110 111 /* 112 * XXX Always set the default hwrev as the latest board 113 * ADC = (voltage) / 3.3 * 4096 114 */ 115 hwrev = 3; 116 117 #define IS_RANGE(x, min, max) ((x) > (min) && (x) < (max)) 118 if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200)) 119 hwrev = 0x0; /* 0.01V 0.01V */ 120 if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200)) 121 hwrev = 0x1; /* 610mV 0.01V */ 122 if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200)) 123 hwrev = 0x2; /* 1.16V 0.01V */ 124 if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200)) 125 hwrev = 0x3; /* 1.79V 0.01V */ 126 #undef IS_RANGE 127 128 debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev); 129 130 return hwrev; 131 } 132 133 static void check_hw_revision(void) 134 { 135 int hwrev; 136 137 hwrev = get_hw_revision(); 138 139 board_rev |= hwrev; 140 } 141 142 #ifdef CONFIG_DISPLAY_BOARDINFO 143 int checkboard(void) 144 { 145 puts("Board:\tUniversal C210\n"); 146 return 0; 147 } 148 #endif 149 150 #ifdef CONFIG_GENERIC_MMC 151 int board_mmc_init(bd_t *bis) 152 { 153 int i, err; 154 155 switch (get_hwrev()) { 156 case 0: 157 /* 158 * Set the low to enable LDO_EN 159 * But when you use the test board for eMMC booting 160 * you should set it HIGH since it removes the inverter 161 */ 162 /* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */ 163 gpio_direction_output(&gpio1->e3, 6, 0); 164 break; 165 default: 166 /* 167 * Default reset state is High and there's no inverter 168 * But set it as HIGH to ensure 169 */ 170 /* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */ 171 gpio_direction_output(&gpio1->e1, 3, 1); 172 break; 173 } 174 175 /* 176 * eMMC GPIO: 177 * SDR 8-bit@48MHz at MMC0 178 * GPK0[0] SD_0_CLK(2) 179 * GPK0[1] SD_0_CMD(2) 180 * GPK0[2] SD_0_CDn -> Not used 181 * GPK0[3:6] SD_0_DATA[0:3](2) 182 * GPK1[3:6] SD_0_DATA[0:3](3) 183 * 184 * DDR 4-bit@26MHz at MMC4 185 * GPK0[0] SD_4_CLK(3) 186 * GPK0[1] SD_4_CMD(3) 187 * GPK0[2] SD_4_CDn -> Not used 188 * GPK0[3:6] SD_4_DATA[0:3](3) 189 * GPK1[3:6] SD_4_DATA[4:7](4) 190 */ 191 for (i = 0; i < 7; i++) { 192 if (i == 2) 193 continue; 194 /* GPK0[0:6] special function 2 */ 195 gpio_cfg_pin(&gpio2->k0, i, 0x2); 196 /* GPK0[0:6] pull disable */ 197 gpio_set_pull(&gpio2->k0, i, GPIO_PULL_NONE); 198 /* GPK0[0:6] drv 4x */ 199 gpio_set_drv(&gpio2->k0, i, GPIO_DRV_4X); 200 } 201 202 for (i = 3; i < 7; i++) { 203 /* GPK1[3:6] special function 3 */ 204 gpio_cfg_pin(&gpio2->k1, i, 0x3); 205 /* GPK1[3:6] pull disable */ 206 gpio_set_pull(&gpio2->k1, i, GPIO_PULL_NONE); 207 /* GPK1[3:6] drv 4x */ 208 gpio_set_drv(&gpio2->k1, i, GPIO_DRV_4X); 209 } 210 211 /* T-flash detect */ 212 gpio_cfg_pin(&gpio2->x3, 4, 0xf); 213 gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP); 214 215 /* 216 * MMC device init 217 * mmc0 : eMMC (8-bit buswidth) 218 * mmc2 : SD card (4-bit buswidth) 219 */ 220 err = s5p_mmc_init(0, 8); 221 222 /* 223 * Check the T-flash detect pin 224 * GPX3[4] T-flash detect pin 225 */ 226 if (!gpio_get_value(&gpio2->x3, 4)) { 227 /* 228 * SD card GPIO: 229 * GPK2[0] SD_2_CLK(2) 230 * GPK2[1] SD_2_CMD(2) 231 * GPK2[2] SD_2_CDn -> Not used 232 * GPK2[3:6] SD_2_DATA[0:3](2) 233 */ 234 for (i = 0; i < 7; i++) { 235 if (i == 2) 236 continue; 237 /* GPK2[0:6] special function 2 */ 238 gpio_cfg_pin(&gpio2->k2, i, 0x2); 239 /* GPK2[0:6] pull disable */ 240 gpio_set_pull(&gpio2->k2, i, GPIO_PULL_NONE); 241 /* GPK2[0:6] drv 4x */ 242 gpio_set_drv(&gpio2->k2, i, GPIO_DRV_4X); 243 } 244 err = s5p_mmc_init(2, 4); 245 } 246 247 return err; 248 249 } 250 #endif 251