1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2011 Samsung Electronics
4  */
5 
6 #include <common.h>
7 #include <asm/gpio.h>
8 #include <asm/io.h>
9 #include <netdev.h>
10 #include <asm/arch/cpu.h>
11 #include <asm/arch/mmc.h>
12 #include <asm/arch/periph.h>
13 #include <asm/arch/pinmux.h>
14 #include <asm/arch/sromc.h>
15 
16 DECLARE_GLOBAL_DATA_PTR;
17 
18 static void smc9115_pre_init(void)
19 {
20 	u32 smc_bw_conf, smc_bc_conf;
21 
22 	/* gpio configuration GPK0CON */
23 	gpio_cfg_pin(EXYNOS4_GPIO_Y00 + CONFIG_ENV_SROM_BANK, S5P_GPIO_FUNC(2));
24 
25 	/* Ethernet needs bus width of 16 bits */
26 	smc_bw_conf = SROMC_DATA16_WIDTH(CONFIG_ENV_SROM_BANK);
27 	smc_bc_conf = SROMC_BC_TACS(0x0F) | SROMC_BC_TCOS(0x0F)
28 			| SROMC_BC_TACC(0x0F) | SROMC_BC_TCOH(0x0F)
29 			| SROMC_BC_TAH(0x0F)  | SROMC_BC_TACP(0x0F)
30 			| SROMC_BC_PMC(0x0F);
31 
32 	/* Select and configure the SROMC bank */
33 	s5p_config_sromc(CONFIG_ENV_SROM_BANK, smc_bw_conf, smc_bc_conf);
34 }
35 
36 int board_init(void)
37 {
38 	smc9115_pre_init();
39 
40 	gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
41 	return 0;
42 }
43 
44 int dram_init(void)
45 {
46 	gd->ram_size	= get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE)
47 			+ get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE)
48 			+ get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE)
49 			+ get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
50 
51 	return 0;
52 }
53 
54 int dram_init_banksize(void)
55 {
56 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
57 	gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1,
58 							PHYS_SDRAM_1_SIZE);
59 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
60 	gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2,
61 							PHYS_SDRAM_2_SIZE);
62 	gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
63 	gd->bd->bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3,
64 							PHYS_SDRAM_3_SIZE);
65 	gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
66 	gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4,
67 							PHYS_SDRAM_4_SIZE);
68 
69 	return 0;
70 }
71 
72 int board_eth_init(bd_t *bis)
73 {
74 	int rc = 0;
75 #ifdef CONFIG_SMC911X
76 	rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
77 #endif
78 	return rc;
79 }
80 
81 #ifdef CONFIG_DISPLAY_BOARDINFO
82 int checkboard(void)
83 {
84 	printf("\nBoard: SMDKV310\n");
85 	return 0;
86 }
87 #endif
88 
89 #ifdef CONFIG_MMC
90 int board_mmc_init(bd_t *bis)
91 {
92 	int i, err;
93 
94 	/*
95 	 * MMC2 SD card GPIO:
96 	 *
97 	 * GPK2[0]	SD_2_CLK(2)
98 	 * GPK2[1]	SD_2_CMD(2)
99 	 * GPK2[2]	SD_2_CDn
100 	 * GPK2[3:6]	SD_2_DATA[0:3](2)
101 	 */
102 	for (i = EXYNOS4_GPIO_K20; i < EXYNOS4_GPIO_K27; i++) {
103 		/* GPK2[0:6] special function 2 */
104 		gpio_cfg_pin(i, S5P_GPIO_FUNC(0x2));
105 
106 		/* GPK2[0:6] drv 4x */
107 		gpio_set_drv(i, S5P_GPIO_DRV_4X);
108 
109 		/* GPK2[0:1] pull disable */
110 		if (i == EXYNOS4_GPIO_K20 || i == EXYNOS4_GPIO_K21) {
111 			gpio_set_pull(i, S5P_GPIO_PULL_NONE);
112 			continue;
113 		}
114 
115 		/* GPK2[2:6] pull up */
116 		gpio_set_pull(i, S5P_GPIO_PULL_UP);
117 	}
118 	err = s5p_mmc_init(2, 4);
119 	return err;
120 }
121 #endif
122 
123 static int board_uart_init(void)
124 {
125 	int err;
126 
127 	err = exynos_pinmux_config(PERIPH_ID_UART0, PINMUX_FLAG_NONE);
128 	if (err) {
129 		debug("UART0 not configured\n");
130 		return err;
131 	}
132 
133 	err = exynos_pinmux_config(PERIPH_ID_UART1, PINMUX_FLAG_NONE);
134 	if (err) {
135 		debug("UART1 not configured\n");
136 		return err;
137 	}
138 
139 	err = exynos_pinmux_config(PERIPH_ID_UART2, PINMUX_FLAG_NONE);
140 	if (err) {
141 		debug("UART2 not configured\n");
142 		return err;
143 	}
144 
145 	err = exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE);
146 	if (err) {
147 		debug("UART3 not configured\n");
148 		return err;
149 	}
150 
151 	return 0;
152 }
153 
154 #ifdef CONFIG_BOARD_EARLY_INIT_F
155 int board_early_init_f(void)
156 {
157 	int err;
158 	err = board_uart_init();
159 	if (err) {
160 		debug("UART init failed\n");
161 		return err;
162 	}
163 	return err;
164 }
165 #endif
166