1 /*
2  * Copyright (C) 2011 Samsung Electronics
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <common.h>
8 #include <asm/gpio.h>
9 #include <asm/io.h>
10 #include <netdev.h>
11 #include <asm/arch/cpu.h>
12 #include <asm/arch/mmc.h>
13 #include <asm/arch/periph.h>
14 #include <asm/arch/pinmux.h>
15 #include <asm/arch/sromc.h>
16 
17 DECLARE_GLOBAL_DATA_PTR;
18 
19 static void smc9115_pre_init(void)
20 {
21 	u32 smc_bw_conf, smc_bc_conf;
22 
23 	/* gpio configuration GPK0CON */
24 	gpio_cfg_pin(EXYNOS4_GPIO_Y00 + CONFIG_ENV_SROM_BANK, S5P_GPIO_FUNC(2));
25 
26 	/* Ethernet needs bus width of 16 bits */
27 	smc_bw_conf = SROMC_DATA16_WIDTH(CONFIG_ENV_SROM_BANK);
28 	smc_bc_conf = SROMC_BC_TACS(0x0F) | SROMC_BC_TCOS(0x0F)
29 			| SROMC_BC_TACC(0x0F) | SROMC_BC_TCOH(0x0F)
30 			| SROMC_BC_TAH(0x0F)  | SROMC_BC_TACP(0x0F)
31 			| SROMC_BC_PMC(0x0F);
32 
33 	/* Select and configure the SROMC bank */
34 	s5p_config_sromc(CONFIG_ENV_SROM_BANK, smc_bw_conf, smc_bc_conf);
35 }
36 
37 int board_init(void)
38 {
39 	smc9115_pre_init();
40 
41 	gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
42 	return 0;
43 }
44 
45 int dram_init(void)
46 {
47 	gd->ram_size	= get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE)
48 			+ get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE)
49 			+ get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE)
50 			+ get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
51 
52 	return 0;
53 }
54 
55 void dram_init_banksize(void)
56 {
57 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
58 	gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1,
59 							PHYS_SDRAM_1_SIZE);
60 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
61 	gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2,
62 							PHYS_SDRAM_2_SIZE);
63 	gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
64 	gd->bd->bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3,
65 							PHYS_SDRAM_3_SIZE);
66 	gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
67 	gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4,
68 							PHYS_SDRAM_4_SIZE);
69 }
70 
71 int board_eth_init(bd_t *bis)
72 {
73 	int rc = 0;
74 #ifdef CONFIG_SMC911X
75 	rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
76 #endif
77 	return rc;
78 }
79 
80 #ifdef CONFIG_DISPLAY_BOARDINFO
81 int checkboard(void)
82 {
83 	printf("\nBoard: SMDKV310\n");
84 	return 0;
85 }
86 #endif
87 
88 #ifdef CONFIG_GENERIC_MMC
89 int board_mmc_init(bd_t *bis)
90 {
91 	int i, err;
92 
93 	/*
94 	 * MMC2 SD card GPIO:
95 	 *
96 	 * GPK2[0]	SD_2_CLK(2)
97 	 * GPK2[1]	SD_2_CMD(2)
98 	 * GPK2[2]	SD_2_CDn
99 	 * GPK2[3:6]	SD_2_DATA[0:3](2)
100 	 */
101 	for (i = EXYNOS4_GPIO_K20; i < EXYNOS4_GPIO_K27; i++) {
102 		/* GPK2[0:6] special function 2 */
103 		gpio_cfg_pin(i, S5P_GPIO_FUNC(0x2));
104 
105 		/* GPK2[0:6] drv 4x */
106 		gpio_set_drv(i, S5P_GPIO_DRV_4X);
107 
108 		/* GPK2[0:1] pull disable */
109 		if (i == EXYNOS4_GPIO_K20 || i == EXYNOS4_GPIO_K21) {
110 			gpio_set_pull(i, S5P_GPIO_PULL_NONE);
111 			continue;
112 		}
113 
114 		/* GPK2[2:6] pull up */
115 		gpio_set_pull(i, S5P_GPIO_PULL_UP);
116 	}
117 	err = s5p_mmc_init(2, 4);
118 	return err;
119 }
120 #endif
121 
122 static int board_uart_init(void)
123 {
124 	int err;
125 
126 	err = exynos_pinmux_config(PERIPH_ID_UART0, PINMUX_FLAG_NONE);
127 	if (err) {
128 		debug("UART0 not configured\n");
129 		return err;
130 	}
131 
132 	err = exynos_pinmux_config(PERIPH_ID_UART1, PINMUX_FLAG_NONE);
133 	if (err) {
134 		debug("UART1 not configured\n");
135 		return err;
136 	}
137 
138 	err = exynos_pinmux_config(PERIPH_ID_UART2, PINMUX_FLAG_NONE);
139 	if (err) {
140 		debug("UART2 not configured\n");
141 		return err;
142 	}
143 
144 	err = exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE);
145 	if (err) {
146 		debug("UART3 not configured\n");
147 		return err;
148 	}
149 
150 	return 0;
151 }
152 
153 #ifdef CONFIG_BOARD_EARLY_INIT_F
154 int board_early_init_f(void)
155 {
156 	int err;
157 	err = board_uart_init();
158 	if (err) {
159 		debug("UART init failed\n");
160 		return err;
161 	}
162 	return err;
163 }
164 #endif
165