1 /*
2  * Copyright (C) 2011 Samsung Electronics
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <common.h>
8 #include <asm/gpio.h>
9 #include <asm/io.h>
10 #include <netdev.h>
11 #include <asm/arch/cpu.h>
12 #include <asm/arch/mmc.h>
13 #include <asm/arch/periph.h>
14 #include <asm/arch/pinmux.h>
15 #include <asm/arch/sromc.h>
16 
17 DECLARE_GLOBAL_DATA_PTR;
18 
19 static void smc9115_pre_init(void)
20 {
21 	u32 smc_bw_conf, smc_bc_conf;
22 
23 	/* gpio configuration GPK0CON */
24 	gpio_cfg_pin(EXYNOS4_GPIO_Y00 + CONFIG_ENV_SROM_BANK, S5P_GPIO_FUNC(2));
25 
26 	/* Ethernet needs bus width of 16 bits */
27 	smc_bw_conf = SROMC_DATA16_WIDTH(CONFIG_ENV_SROM_BANK);
28 	smc_bc_conf = SROMC_BC_TACS(0x0F) | SROMC_BC_TCOS(0x0F)
29 			| SROMC_BC_TACC(0x0F) | SROMC_BC_TCOH(0x0F)
30 			| SROMC_BC_TAH(0x0F)  | SROMC_BC_TACP(0x0F)
31 			| SROMC_BC_PMC(0x0F);
32 
33 	/* Select and configure the SROMC bank */
34 	s5p_config_sromc(CONFIG_ENV_SROM_BANK, smc_bw_conf, smc_bc_conf);
35 }
36 
37 int board_init(void)
38 {
39 	smc9115_pre_init();
40 
41 	gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
42 	return 0;
43 }
44 
45 int dram_init(void)
46 {
47 	gd->ram_size	= get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE)
48 			+ get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE)
49 			+ get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE)
50 			+ get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
51 
52 	return 0;
53 }
54 
55 int dram_init_banksize(void)
56 {
57 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
58 	gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1,
59 							PHYS_SDRAM_1_SIZE);
60 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
61 	gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2,
62 							PHYS_SDRAM_2_SIZE);
63 	gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
64 	gd->bd->bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3,
65 							PHYS_SDRAM_3_SIZE);
66 	gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
67 	gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4,
68 							PHYS_SDRAM_4_SIZE);
69 
70 	return 0;
71 }
72 
73 int board_eth_init(bd_t *bis)
74 {
75 	int rc = 0;
76 #ifdef CONFIG_SMC911X
77 	rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
78 #endif
79 	return rc;
80 }
81 
82 #ifdef CONFIG_DISPLAY_BOARDINFO
83 int checkboard(void)
84 {
85 	printf("\nBoard: SMDKV310\n");
86 	return 0;
87 }
88 #endif
89 
90 #ifdef CONFIG_MMC
91 int board_mmc_init(bd_t *bis)
92 {
93 	int i, err;
94 
95 	/*
96 	 * MMC2 SD card GPIO:
97 	 *
98 	 * GPK2[0]	SD_2_CLK(2)
99 	 * GPK2[1]	SD_2_CMD(2)
100 	 * GPK2[2]	SD_2_CDn
101 	 * GPK2[3:6]	SD_2_DATA[0:3](2)
102 	 */
103 	for (i = EXYNOS4_GPIO_K20; i < EXYNOS4_GPIO_K27; i++) {
104 		/* GPK2[0:6] special function 2 */
105 		gpio_cfg_pin(i, S5P_GPIO_FUNC(0x2));
106 
107 		/* GPK2[0:6] drv 4x */
108 		gpio_set_drv(i, S5P_GPIO_DRV_4X);
109 
110 		/* GPK2[0:1] pull disable */
111 		if (i == EXYNOS4_GPIO_K20 || i == EXYNOS4_GPIO_K21) {
112 			gpio_set_pull(i, S5P_GPIO_PULL_NONE);
113 			continue;
114 		}
115 
116 		/* GPK2[2:6] pull up */
117 		gpio_set_pull(i, S5P_GPIO_PULL_UP);
118 	}
119 	err = s5p_mmc_init(2, 4);
120 	return err;
121 }
122 #endif
123 
124 static int board_uart_init(void)
125 {
126 	int err;
127 
128 	err = exynos_pinmux_config(PERIPH_ID_UART0, PINMUX_FLAG_NONE);
129 	if (err) {
130 		debug("UART0 not configured\n");
131 		return err;
132 	}
133 
134 	err = exynos_pinmux_config(PERIPH_ID_UART1, PINMUX_FLAG_NONE);
135 	if (err) {
136 		debug("UART1 not configured\n");
137 		return err;
138 	}
139 
140 	err = exynos_pinmux_config(PERIPH_ID_UART2, PINMUX_FLAG_NONE);
141 	if (err) {
142 		debug("UART2 not configured\n");
143 		return err;
144 	}
145 
146 	err = exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE);
147 	if (err) {
148 		debug("UART3 not configured\n");
149 		return err;
150 	}
151 
152 	return 0;
153 }
154 
155 #ifdef CONFIG_BOARD_EARLY_INIT_F
156 int board_early_init_f(void)
157 {
158 	int err;
159 	err = board_uart_init();
160 	if (err) {
161 		debug("UART init failed\n");
162 		return err;
163 	}
164 	return err;
165 }
166 #endif
167