1e21185baSChander Kashyap /*
2e21185baSChander Kashyap  * Copyright (C) 2011 Samsung Electronics
3e21185baSChander Kashyap  *
41a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
5e21185baSChander Kashyap  */
6e21185baSChander Kashyap 
7e21185baSChander Kashyap #include <common.h>
8e21185baSChander Kashyap #include <asm/io.h>
9e21185baSChander Kashyap #include <netdev.h>
10e21185baSChander Kashyap #include <asm/arch/cpu.h>
11e21185baSChander Kashyap #include <asm/arch/gpio.h>
12e21185baSChander Kashyap #include <asm/arch/mmc.h>
13198a40b9SRajeshwari Shinde #include <asm/arch/periph.h>
14198a40b9SRajeshwari Shinde #include <asm/arch/pinmux.h>
15e21185baSChander Kashyap #include <asm/arch/sromc.h>
16e21185baSChander Kashyap 
17e21185baSChander Kashyap DECLARE_GLOBAL_DATA_PTR;
18e21185baSChander Kashyap 
19e21185baSChander Kashyap static void smc9115_pre_init(void)
20e21185baSChander Kashyap {
21e21185baSChander Kashyap 	u32 smc_bw_conf, smc_bc_conf;
22e21185baSChander Kashyap 
23e21185baSChander Kashyap 	/* gpio configuration GPK0CON */
24*f6ae1ca0SAkshay Saraswat 	gpio_cfg_pin(EXYNOS4_GPIO_Y00 + CONFIG_ENV_SROM_BANK, S5P_GPIO_FUNC(2));
25e21185baSChander Kashyap 
26e21185baSChander Kashyap 	/* Ethernet needs bus width of 16 bits */
27e21185baSChander Kashyap 	smc_bw_conf = SROMC_DATA16_WIDTH(CONFIG_ENV_SROM_BANK);
28e21185baSChander Kashyap 	smc_bc_conf = SROMC_BC_TACS(0x0F) | SROMC_BC_TCOS(0x0F)
29e21185baSChander Kashyap 			| SROMC_BC_TACC(0x0F) | SROMC_BC_TCOH(0x0F)
30e21185baSChander Kashyap 			| SROMC_BC_TAH(0x0F)  | SROMC_BC_TACP(0x0F)
31e21185baSChander Kashyap 			| SROMC_BC_PMC(0x0F);
32e21185baSChander Kashyap 
33e21185baSChander Kashyap 	/* Select and configure the SROMC bank */
34e21185baSChander Kashyap 	s5p_config_sromc(CONFIG_ENV_SROM_BANK, smc_bw_conf, smc_bc_conf);
35e21185baSChander Kashyap }
36e21185baSChander Kashyap 
37e21185baSChander Kashyap int board_init(void)
38e21185baSChander Kashyap {
39e21185baSChander Kashyap 	smc9115_pre_init();
40e21185baSChander Kashyap 
41e21185baSChander Kashyap 	gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
42e21185baSChander Kashyap 	return 0;
43e21185baSChander Kashyap }
44e21185baSChander Kashyap 
45e21185baSChander Kashyap int dram_init(void)
46e21185baSChander Kashyap {
47e21185baSChander Kashyap 	gd->ram_size	= get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE)
48e21185baSChander Kashyap 			+ get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE)
49e21185baSChander Kashyap 			+ get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE)
50e21185baSChander Kashyap 			+ get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
51e21185baSChander Kashyap 
52e21185baSChander Kashyap 	return 0;
53e21185baSChander Kashyap }
54e21185baSChander Kashyap 
55e21185baSChander Kashyap void dram_init_banksize(void)
56e21185baSChander Kashyap {
57e21185baSChander Kashyap 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
589436a0c9SChander Kashyap 	gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1, \
599436a0c9SChander Kashyap 							PHYS_SDRAM_1_SIZE);
60e21185baSChander Kashyap 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
619436a0c9SChander Kashyap 	gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2, \
629436a0c9SChander Kashyap 							PHYS_SDRAM_2_SIZE);
63e21185baSChander Kashyap 	gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
649436a0c9SChander Kashyap 	gd->bd->bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3, \
659436a0c9SChander Kashyap 							PHYS_SDRAM_3_SIZE);
66e21185baSChander Kashyap 	gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
679436a0c9SChander Kashyap 	gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4, \
689436a0c9SChander Kashyap 							PHYS_SDRAM_4_SIZE);
69e21185baSChander Kashyap }
70e21185baSChander Kashyap 
71e21185baSChander Kashyap int board_eth_init(bd_t *bis)
72e21185baSChander Kashyap {
73e21185baSChander Kashyap 	int rc = 0;
74e21185baSChander Kashyap #ifdef CONFIG_SMC911X
75e21185baSChander Kashyap 	rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
76e21185baSChander Kashyap #endif
77e21185baSChander Kashyap 	return rc;
78e21185baSChander Kashyap }
79e21185baSChander Kashyap 
80e21185baSChander Kashyap #ifdef CONFIG_DISPLAY_BOARDINFO
81e21185baSChander Kashyap int checkboard(void)
82e21185baSChander Kashyap {
83e21185baSChander Kashyap 	printf("\nBoard: SMDKV310\n");
84e21185baSChander Kashyap 	return 0;
85e21185baSChander Kashyap }
86e21185baSChander Kashyap #endif
87e21185baSChander Kashyap 
88e21185baSChander Kashyap #ifdef CONFIG_GENERIC_MMC
89e21185baSChander Kashyap int board_mmc_init(bd_t *bis)
90e21185baSChander Kashyap {
91e21185baSChander Kashyap 	int i, err;
92e21185baSChander Kashyap 
93e21185baSChander Kashyap 	/*
94e21185baSChander Kashyap 	 * MMC2 SD card GPIO:
95e21185baSChander Kashyap 	 *
96e21185baSChander Kashyap 	 * GPK2[0]	SD_2_CLK(2)
97e21185baSChander Kashyap 	 * GPK2[1]	SD_2_CMD(2)
98e21185baSChander Kashyap 	 * GPK2[2]	SD_2_CDn
99e21185baSChander Kashyap 	 * GPK2[3:6]	SD_2_DATA[0:3](2)
100e21185baSChander Kashyap 	 */
101*f6ae1ca0SAkshay Saraswat 	for (i = EXYNOS4_GPIO_K20; i < EXYNOS4_GPIO_K27; i++) {
102e21185baSChander Kashyap 		/* GPK2[0:6] special function 2 */
103*f6ae1ca0SAkshay Saraswat 		gpio_cfg_pin(i, S5P_GPIO_FUNC(0x2));
104e21185baSChander Kashyap 
105e21185baSChander Kashyap 		/* GPK2[0:6] drv 4x */
106*f6ae1ca0SAkshay Saraswat 		gpio_set_drv(i, S5P_GPIO_DRV_4X);
107e21185baSChander Kashyap 
108e21185baSChander Kashyap 		/* GPK2[0:1] pull disable */
109*f6ae1ca0SAkshay Saraswat 		if (i == EXYNOS4_GPIO_K20 || i == EXYNOS4_GPIO_K21) {
110*f6ae1ca0SAkshay Saraswat 			gpio_set_pull(i, S5P_GPIO_PULL_NONE);
111e21185baSChander Kashyap 			continue;
112e21185baSChander Kashyap 		}
113e21185baSChander Kashyap 
114e21185baSChander Kashyap 		/* GPK2[2:6] pull up */
115*f6ae1ca0SAkshay Saraswat 		gpio_set_pull(i, S5P_GPIO_PULL_UP);
116e21185baSChander Kashyap 	}
117e21185baSChander Kashyap 	err = s5p_mmc_init(2, 4);
118e21185baSChander Kashyap 	return err;
119e21185baSChander Kashyap }
120e21185baSChander Kashyap #endif
121198a40b9SRajeshwari Shinde 
122198a40b9SRajeshwari Shinde static int board_uart_init(void)
123198a40b9SRajeshwari Shinde {
124198a40b9SRajeshwari Shinde 	int err;
125198a40b9SRajeshwari Shinde 
126198a40b9SRajeshwari Shinde 	err = exynos_pinmux_config(PERIPH_ID_UART0, PINMUX_FLAG_NONE);
127198a40b9SRajeshwari Shinde 	if (err) {
128198a40b9SRajeshwari Shinde 		debug("UART0 not configured\n");
129198a40b9SRajeshwari Shinde 		return err;
130198a40b9SRajeshwari Shinde 	}
131198a40b9SRajeshwari Shinde 
132198a40b9SRajeshwari Shinde 	err = exynos_pinmux_config(PERIPH_ID_UART1, PINMUX_FLAG_NONE);
133198a40b9SRajeshwari Shinde 	if (err) {
134198a40b9SRajeshwari Shinde 		debug("UART1 not configured\n");
135198a40b9SRajeshwari Shinde 		return err;
136198a40b9SRajeshwari Shinde 	}
137198a40b9SRajeshwari Shinde 
138198a40b9SRajeshwari Shinde 	err = exynos_pinmux_config(PERIPH_ID_UART2, PINMUX_FLAG_NONE);
139198a40b9SRajeshwari Shinde 	if (err) {
140198a40b9SRajeshwari Shinde 		debug("UART2 not configured\n");
141198a40b9SRajeshwari Shinde 		return err;
142198a40b9SRajeshwari Shinde 	}
143198a40b9SRajeshwari Shinde 
144198a40b9SRajeshwari Shinde 	err = exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE);
145198a40b9SRajeshwari Shinde 	if (err) {
146198a40b9SRajeshwari Shinde 		debug("UART3 not configured\n");
147198a40b9SRajeshwari Shinde 		return err;
148198a40b9SRajeshwari Shinde 	}
149198a40b9SRajeshwari Shinde 
150198a40b9SRajeshwari Shinde 	return 0;
151198a40b9SRajeshwari Shinde }
152198a40b9SRajeshwari Shinde 
153198a40b9SRajeshwari Shinde #ifdef CONFIG_BOARD_EARLY_INIT_F
154198a40b9SRajeshwari Shinde int board_early_init_f(void)
155198a40b9SRajeshwari Shinde {
156198a40b9SRajeshwari Shinde 	int err;
157198a40b9SRajeshwari Shinde 	err = board_uart_init();
158198a40b9SRajeshwari Shinde 	if (err) {
159198a40b9SRajeshwari Shinde 		debug("UART init failed\n");
160198a40b9SRajeshwari Shinde 		return err;
161198a40b9SRajeshwari Shinde 	}
162198a40b9SRajeshwari Shinde 	return err;
163198a40b9SRajeshwari Shinde }
164198a40b9SRajeshwari Shinde #endif
165