xref: /openbmc/u-boot/board/samsung/goni/goni.c (revision bcc05c7a)
1 /*
2  *  Copyright (C) 2008-2009 Samsung Electronics
3  *  Minkyu Kang <mk7.kang@samsung.com>
4  *  Kyungmin Park <kyungmin.park@samsung.com>
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #include <common.h>
10 #include <asm/arch/gpio.h>
11 #include <asm/arch/mmc.h>
12 #include <power/pmic.h>
13 #include <usb/s3c_udc.h>
14 #include <asm/arch/cpu.h>
15 #include <power/max8998_pmic.h>
16 DECLARE_GLOBAL_DATA_PTR;
17 
18 static struct s5pc110_gpio *s5pc110_gpio;
19 
20 int board_init(void)
21 {
22 	/* Set Initial global variables */
23 	s5pc110_gpio = (struct s5pc110_gpio *)S5PC110_GPIO_BASE;
24 
25 	gd->bd->bi_arch_number = MACH_TYPE_GONI;
26 	gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
27 
28 	return 0;
29 }
30 
31 int power_init_board(void)
32 {
33 	int ret;
34 
35 	/*
36 	 * For PMIC the I2C bus is named as I2C5, but it is connected
37 	 * to logical I2C adapter 0
38 	 */
39 	ret = pmic_init(I2C_0);
40 	if (ret)
41 		return ret;
42 
43 	return 0;
44 }
45 
46 int dram_init(void)
47 {
48 	gd->ram_size = PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE +
49 			PHYS_SDRAM_3_SIZE;
50 
51 	return 0;
52 }
53 
54 void dram_init_banksize(void)
55 {
56 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
57 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
58 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
59 	gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
60 	gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
61 	gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
62 }
63 
64 #ifdef CONFIG_DISPLAY_BOARDINFO
65 int checkboard(void)
66 {
67 	puts("Board:\tGoni\n");
68 	return 0;
69 }
70 #endif
71 
72 #ifdef CONFIG_GENERIC_MMC
73 int board_mmc_init(bd_t *bis)
74 {
75 	int i;
76 
77 	/* MASSMEMORY_EN: XMSMDATA7: GPJ2[7] output high */
78 	s5p_gpio_direction_output(&s5pc110_gpio->j2, 7, 1);
79 
80 	/*
81 	 * MMC0 GPIO
82 	 * GPG0[0]	SD_0_CLK
83 	 * GPG0[1]	SD_0_CMD
84 	 * GPG0[2]	SD_0_CDn	-> Not used
85 	 * GPG0[3:6]	SD_0_DATA[0:3]
86 	 */
87 	for (i = 0; i < 7; i++) {
88 		if (i == 2)
89 			continue;
90 		/* GPG0[0:6] special function 2 */
91 		s5p_gpio_cfg_pin(&s5pc110_gpio->g0, i, 0x2);
92 		/* GPG0[0:6] pull disable */
93 		s5p_gpio_set_pull(&s5pc110_gpio->g0, i, GPIO_PULL_NONE);
94 		/* GPG0[0:6] drv 4x */
95 		s5p_gpio_set_drv(&s5pc110_gpio->g0, i, GPIO_DRV_4X);
96 	}
97 
98 	return s5p_mmc_init(0, 4);
99 }
100 #endif
101 
102 #ifdef CONFIG_USB_GADGET
103 static int s5pc1xx_phy_control(int on)
104 {
105 	int ret;
106 	static int status;
107 	struct pmic *p = pmic_get("MAX8998_PMIC");
108 	if (!p)
109 		return -ENODEV;
110 
111 	if (pmic_probe(p))
112 		return -1;
113 
114 	if (on && !status) {
115 		ret = pmic_set_output(p, MAX8998_REG_ONOFF1,
116 				      MAX8998_LDO3, LDO_ON);
117 		ret = pmic_set_output(p, MAX8998_REG_ONOFF2,
118 				      MAX8998_LDO8, LDO_ON);
119 		if (ret) {
120 			puts("MAX8998 LDO setting error!\n");
121 			return -1;
122 		}
123 		status = 1;
124 	} else if (!on && status) {
125 		ret = pmic_set_output(p, MAX8998_REG_ONOFF1,
126 				      MAX8998_LDO3, LDO_OFF);
127 		ret = pmic_set_output(p, MAX8998_REG_ONOFF2,
128 				      MAX8998_LDO8, LDO_OFF);
129 		if (ret) {
130 			puts("MAX8998 LDO setting error!\n");
131 			return -1;
132 		}
133 		status = 0;
134 	}
135 	udelay(10000);
136 
137 	return 0;
138 }
139 
140 struct s3c_plat_otg_data s5pc110_otg_data = {
141 	.phy_control = s5pc1xx_phy_control,
142 	.regs_phy = S5PC110_PHY_BASE,
143 	.regs_otg = S5PC110_OTG_BASE,
144 	.usb_phy_ctrl = S5PC110_USB_PHY_CONTROL,
145 };
146 #endif
147