xref: /openbmc/u-boot/board/samsung/goni/goni.c (revision 03efcb05)
1 /*
2  *  Copyright (C) 2008-2009 Samsung Electronics
3  *  Minkyu Kang <mk7.kang@samsung.com>
4  *  Kyungmin Park <kyungmin.park@samsung.com>
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #include <common.h>
10 #include <asm/arch/gpio.h>
11 #include <asm/arch/mmc.h>
12 #include <power/pmic.h>
13 #include <usb/s3c_udc.h>
14 #include <asm/arch/cpu.h>
15 #include <power/max8998_pmic.h>
16 DECLARE_GLOBAL_DATA_PTR;
17 
18 static struct s5pc110_gpio *s5pc110_gpio;
19 
20 int board_init(void)
21 {
22 	/* Set Initial global variables */
23 	s5pc110_gpio = (struct s5pc110_gpio *)S5PC110_GPIO_BASE;
24 
25 	gd->bd->bi_arch_number = MACH_TYPE_GONI;
26 	gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
27 
28 	return 0;
29 }
30 
31 int power_init_board(void)
32 {
33 	int ret;
34 
35 	ret = pmic_init(I2C_5);
36 	if (ret)
37 		return ret;
38 
39 	return 0;
40 }
41 
42 int dram_init(void)
43 {
44 	gd->ram_size = PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE +
45 			PHYS_SDRAM_3_SIZE;
46 
47 	return 0;
48 }
49 
50 void dram_init_banksize(void)
51 {
52 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
53 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
54 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
55 	gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
56 	gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
57 	gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
58 }
59 
60 #ifdef CONFIG_DISPLAY_BOARDINFO
61 int checkboard(void)
62 {
63 	puts("Board:\tGoni\n");
64 	return 0;
65 }
66 #endif
67 
68 #ifdef CONFIG_GENERIC_MMC
69 int board_mmc_init(bd_t *bis)
70 {
71 	int i;
72 
73 	/* MASSMEMORY_EN: XMSMDATA7: GPJ2[7] output high */
74 	s5p_gpio_direction_output(&s5pc110_gpio->j2, 7, 1);
75 
76 	/*
77 	 * MMC0 GPIO
78 	 * GPG0[0]	SD_0_CLK
79 	 * GPG0[1]	SD_0_CMD
80 	 * GPG0[2]	SD_0_CDn	-> Not used
81 	 * GPG0[3:6]	SD_0_DATA[0:3]
82 	 */
83 	for (i = 0; i < 7; i++) {
84 		if (i == 2)
85 			continue;
86 		/* GPG0[0:6] special function 2 */
87 		s5p_gpio_cfg_pin(&s5pc110_gpio->g0, i, 0x2);
88 		/* GPG0[0:6] pull disable */
89 		s5p_gpio_set_pull(&s5pc110_gpio->g0, i, GPIO_PULL_NONE);
90 		/* GPG0[0:6] drv 4x */
91 		s5p_gpio_set_drv(&s5pc110_gpio->g0, i, GPIO_DRV_4X);
92 	}
93 
94 	return s5p_mmc_init(0, 4);
95 }
96 #endif
97 
98 #ifdef CONFIG_USB_GADGET
99 static int s5pc1xx_phy_control(int on)
100 {
101 	int ret;
102 	static int status;
103 	struct pmic *p = pmic_get("MAX8998_PMIC");
104 	if (!p)
105 		return -ENODEV;
106 
107 	if (pmic_probe(p))
108 		return -1;
109 
110 	if (on && !status) {
111 		ret = pmic_set_output(p, MAX8998_REG_ONOFF1,
112 				      MAX8998_LDO3, LDO_ON);
113 		ret = pmic_set_output(p, MAX8998_REG_ONOFF2,
114 				      MAX8998_LDO8, LDO_ON);
115 		if (ret) {
116 			puts("MAX8998 LDO setting error!\n");
117 			return -1;
118 		}
119 		status = 1;
120 	} else if (!on && status) {
121 		ret = pmic_set_output(p, MAX8998_REG_ONOFF1,
122 				      MAX8998_LDO3, LDO_OFF);
123 		ret = pmic_set_output(p, MAX8998_REG_ONOFF2,
124 				      MAX8998_LDO8, LDO_OFF);
125 		if (ret) {
126 			puts("MAX8998 LDO setting error!\n");
127 			return -1;
128 		}
129 		status = 0;
130 	}
131 	udelay(10000);
132 
133 	return 0;
134 }
135 
136 struct s3c_plat_otg_data s5pc110_otg_data = {
137 	.phy_control = s5pc1xx_phy_control,
138 	.regs_phy = S5PC110_PHY_BASE,
139 	.regs_otg = S5PC110_OTG_BASE,
140 	.usb_phy_ctrl = S5PC110_USB_PHY_CONTROL,
141 };
142 #endif
143