1 /* 2 * Copyright (C) 2012 Samsung Electronics 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <dm.h> 9 #include <dwc3-uboot.h> 10 #include <fdtdec.h> 11 #include <asm/io.h> 12 #include <errno.h> 13 #include <i2c.h> 14 #include <mmc.h> 15 #include <netdev.h> 16 #include <samsung-usb-phy-uboot.h> 17 #include <spi.h> 18 #include <usb.h> 19 #include <video_bridge.h> 20 #include <asm/gpio.h> 21 #include <asm/arch/cpu.h> 22 #include <asm/arch/dwmmc.h> 23 #include <asm/arch/mmc.h> 24 #include <asm/arch/pinmux.h> 25 #include <asm/arch/power.h> 26 #include <asm/arch/sromc.h> 27 #include <power/pmic.h> 28 #include <power/max77686_pmic.h> 29 #include <power/regulator.h> 30 #include <power/s2mps11.h> 31 #include <power/s5m8767.h> 32 #include <samsung/exynos5-dt-types.h> 33 #include <samsung/misc.h> 34 #include <tmu.h> 35 36 DECLARE_GLOBAL_DATA_PTR; 37 38 static void board_enable_audio_codec(void) 39 { 40 int node, ret; 41 struct gpio_desc en_gpio; 42 43 node = fdtdec_next_compatible(gd->fdt_blob, 0, 44 COMPAT_SAMSUNG_EXYNOS5_SOUND); 45 if (node <= 0) 46 return; 47 48 ret = gpio_request_by_name_nodev(gd->fdt_blob, node, 49 "codec-enable-gpio", 0, &en_gpio, 50 GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE); 51 if (ret == -FDT_ERR_NOTFOUND) 52 return; 53 54 /* Turn on the GPIO which connects to the codec's "enable" line. */ 55 gpio_set_pull(gpio_get_number(&en_gpio), S5P_GPIO_PULL_NONE); 56 57 #ifdef CONFIG_SOUND_MAX98095 58 /* Enable MAX98095 Codec */ 59 gpio_request(EXYNOS5_GPIO_X17, "max98095_enable"); 60 gpio_direction_output(EXYNOS5_GPIO_X17, 1); 61 gpio_set_pull(EXYNOS5_GPIO_X17, S5P_GPIO_PULL_NONE); 62 #endif 63 } 64 65 int exynos_init(void) 66 { 67 board_enable_audio_codec(); 68 69 return 0; 70 } 71 72 static int exynos_set_regulator(const char *name, uint uv) 73 { 74 struct udevice *dev; 75 int ret; 76 77 ret = regulator_get_by_platname(name, &dev); 78 if (ret) { 79 debug("%s: Cannot find regulator %s\n", __func__, name); 80 return ret; 81 } 82 ret = regulator_set_value(dev, uv); 83 if (ret) { 84 debug("%s: Cannot set regulator %s\n", __func__, name); 85 return ret; 86 } 87 88 return 0; 89 } 90 91 int exynos_power_init(void) 92 { 93 struct udevice *dev; 94 int ret; 95 96 ret = pmic_get("max77686", &dev); 97 if (!ret) { 98 /* TODO(sjg@chromium.org): Move into the clock/pmic API */ 99 ret = pmic_clrsetbits(dev, MAX77686_REG_PMIC_32KHZ, 0, 100 MAX77686_32KHCP_EN); 101 if (ret) 102 return ret; 103 ret = pmic_clrsetbits(dev, MAX77686_REG_PMIC_BBAT, 0, 104 MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V); 105 if (ret) 106 return ret; 107 } else { 108 ret = pmic_get("s5m8767-pmic", &dev); 109 /* TODO(sjg@chromium.org): Use driver model to access clock */ 110 #ifdef CONFIG_PMIC_S5M8767 111 if (!ret) 112 s5m8767_enable_32khz_cp(dev); 113 #endif 114 } 115 if (ret == -ENODEV) 116 return 0; 117 118 ret = regulators_enable_boot_on(false); 119 if (ret) 120 return ret; 121 122 ret = exynos_set_regulator("vdd_mif", 1100000); 123 if (ret) 124 return ret; 125 126 /* 127 * This would normally be 1.3V, but since we are running slowly 1.1V 128 * is enough. For spring it helps reduce CPU temperature and avoid 129 * hangs with the case open. 1.1V is minimum voltage borderline for 130 * chained bootloaders. 131 */ 132 ret = exynos_set_regulator("vdd_arm", 1100000); 133 if (ret) 134 return ret; 135 ret = exynos_set_regulator("vdd_int", 1012500); 136 if (ret) 137 return ret; 138 ret = exynos_set_regulator("vdd_g3d", 1200000); 139 if (ret) 140 return ret; 141 142 return 0; 143 } 144 145 int board_get_revision(void) 146 { 147 return 0; 148 } 149 150 #ifdef CONFIG_USB_DWC3 151 static struct dwc3_device dwc3_device_data = { 152 .maximum_speed = USB_SPEED_SUPER, 153 .base = 0x12400000, 154 .dr_mode = USB_DR_MODE_PERIPHERAL, 155 .index = 0, 156 }; 157 158 int usb_gadget_handle_interrupts(void) 159 { 160 dwc3_uboot_handle_interrupt(0); 161 return 0; 162 } 163 164 int board_usb_init(int index, enum usb_init_type init) 165 { 166 struct exynos_usb3_phy *phy = (struct exynos_usb3_phy *) 167 samsung_get_base_usb3_phy(); 168 169 if (!phy) { 170 error("usb3 phy not supported"); 171 return -ENODEV; 172 } 173 174 set_usbdrd_phy_ctrl(POWER_USB_DRD_PHY_CTRL_EN); 175 exynos5_usb3_phy_init(phy); 176 177 return dwc3_uboot_init(&dwc3_device_data); 178 } 179 #endif 180 #ifdef CONFIG_SET_DFU_ALT_INFO 181 char *get_dfu_alt_system(char *interface, char *devstr) 182 { 183 char *info = "Not supported!"; 184 185 if (board_is_odroidxu4()) 186 return info; 187 188 return getenv("dfu_alt_system"); 189 } 190 191 char *get_dfu_alt_boot(char *interface, char *devstr) 192 { 193 char *info = "Not supported!"; 194 struct mmc *mmc; 195 char *alt_boot; 196 int dev_num; 197 198 if (board_is_odroidxu4()) 199 return info; 200 201 dev_num = simple_strtoul(devstr, NULL, 10); 202 203 mmc = find_mmc_device(dev_num); 204 if (!mmc) 205 return NULL; 206 207 if (mmc_init(mmc)) 208 return NULL; 209 210 if (IS_SD(mmc)) 211 alt_boot = CONFIG_DFU_ALT_BOOT_SD; 212 else 213 alt_boot = CONFIG_DFU_ALT_BOOT_EMMC; 214 215 return alt_boot; 216 } 217 #endif 218