1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2012 Samsung Electronics
4  */
5 
6 #include <common.h>
7 #include <dm.h>
8 #include <dwc3-uboot.h>
9 #include <fdtdec.h>
10 #include <asm/io.h>
11 #include <errno.h>
12 #include <i2c.h>
13 #include <mmc.h>
14 #include <netdev.h>
15 #include <samsung-usb-phy-uboot.h>
16 #include <spi.h>
17 #include <usb.h>
18 #include <video_bridge.h>
19 #include <asm/gpio.h>
20 #include <asm/arch/cpu.h>
21 #include <asm/arch/dwmmc.h>
22 #include <asm/arch/mmc.h>
23 #include <asm/arch/pinmux.h>
24 #include <asm/arch/power.h>
25 #include <asm/arch/sromc.h>
26 #include <power/pmic.h>
27 #include <power/max77686_pmic.h>
28 #include <power/regulator.h>
29 #include <power/s2mps11.h>
30 #include <power/s5m8767.h>
31 #include <samsung/exynos5-dt-types.h>
32 #include <samsung/misc.h>
33 #include <tmu.h>
34 
35 DECLARE_GLOBAL_DATA_PTR;
36 
37 static void board_enable_audio_codec(void)
38 {
39 	int node, ret;
40 	struct gpio_desc en_gpio;
41 
42 	node = fdtdec_next_compatible(gd->fdt_blob, 0,
43 		COMPAT_SAMSUNG_EXYNOS5_SOUND);
44 	if (node <= 0)
45 		return;
46 
47 	ret = gpio_request_by_name_nodev(offset_to_ofnode(node),
48 					 "codec-enable-gpio", 0, &en_gpio,
49 					 GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
50 	if (ret == -FDT_ERR_NOTFOUND)
51 		return;
52 
53 	/* Turn on the GPIO which connects to the codec's "enable" line. */
54 	gpio_set_pull(gpio_get_number(&en_gpio), S5P_GPIO_PULL_NONE);
55 
56 #ifdef CONFIG_SOUND_MAX98095
57 	/* Enable MAX98095 Codec */
58 	gpio_request(EXYNOS5_GPIO_X17, "max98095_enable");
59 	gpio_direction_output(EXYNOS5_GPIO_X17, 1);
60 	gpio_set_pull(EXYNOS5_GPIO_X17, S5P_GPIO_PULL_NONE);
61 #endif
62 }
63 
64 int exynos_init(void)
65 {
66 	board_enable_audio_codec();
67 
68 	return 0;
69 }
70 
71 static int exynos_set_regulator(const char *name, uint uv)
72 {
73 	struct udevice *dev;
74 	int ret;
75 
76 	ret = regulator_get_by_platname(name, &dev);
77 	if (ret) {
78 		debug("%s: Cannot find regulator %s\n", __func__, name);
79 		return ret;
80 	}
81 	ret = regulator_set_value(dev, uv);
82 	if (ret) {
83 		debug("%s: Cannot set regulator %s\n", __func__, name);
84 		return ret;
85 	}
86 
87 	return 0;
88 }
89 
90 int exynos_power_init(void)
91 {
92 	struct udevice *dev;
93 	int ret;
94 
95 #ifdef CONFIG_PMIC_S2MPS11
96 	ret = pmic_get("s2mps11_pmic", &dev);
97 #else
98 	ret = pmic_get("max77686", &dev);
99 	if (!ret) {
100 		/* TODO(sjg@chromium.org): Move into the clock/pmic API */
101 		ret = pmic_clrsetbits(dev, MAX77686_REG_PMIC_32KHZ, 0,
102 				MAX77686_32KHCP_EN);
103 		if (ret)
104 			return ret;
105 		ret = pmic_clrsetbits(dev, MAX77686_REG_PMIC_BBAT, 0,
106 				MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V);
107 		if (ret)
108 			return ret;
109 	} else {
110 		ret = pmic_get("s5m8767-pmic", &dev);
111 		/* TODO(sjg@chromium.org): Use driver model to access clock */
112 #ifdef CONFIG_PMIC_S5M8767
113 		if (!ret)
114 			s5m8767_enable_32khz_cp(dev);
115 #endif
116 	}
117 #endif	/* CONFIG_PMIC_S2MPS11 */
118 	if (ret == -ENODEV)
119 		return 0;
120 
121 	ret = regulators_enable_boot_on(false);
122 	if (ret)
123 		return ret;
124 
125 	ret = exynos_set_regulator("vdd_mif", 1100000);
126 	if (ret)
127 		return ret;
128 
129 	ret = exynos_set_regulator("vdd_arm", 1300000);
130 	if (ret)
131 		return ret;
132 	ret = exynos_set_regulator("vdd_int", 1012500);
133 	if (ret)
134 		return ret;
135 	ret = exynos_set_regulator("vdd_g3d", 1200000);
136 	if (ret)
137 		return ret;
138 
139 	return 0;
140 }
141 
142 int board_get_revision(void)
143 {
144 	return 0;
145 }
146 
147 #ifdef CONFIG_USB_DWC3
148 static struct dwc3_device dwc3_device_data = {
149 	.maximum_speed = USB_SPEED_SUPER,
150 	.base = 0x12400000,
151 	.dr_mode = USB_DR_MODE_PERIPHERAL,
152 	.index = 0,
153 };
154 
155 int usb_gadget_handle_interrupts(void)
156 {
157 	dwc3_uboot_handle_interrupt(0);
158 	return 0;
159 }
160 
161 int board_usb_init(int index, enum usb_init_type init)
162 {
163 	struct exynos_usb3_phy *phy = (struct exynos_usb3_phy *)
164 		samsung_get_base_usb3_phy();
165 
166 	if (!phy) {
167 		pr_err("usb3 phy not supported");
168 		return -ENODEV;
169 	}
170 
171 	set_usbdrd_phy_ctrl(POWER_USB_DRD_PHY_CTRL_EN);
172 	exynos5_usb3_phy_init(phy);
173 
174 	return dwc3_uboot_init(&dwc3_device_data);
175 }
176 #endif
177 #ifdef CONFIG_SET_DFU_ALT_INFO
178 char *get_dfu_alt_system(char *interface, char *devstr)
179 {
180 	char *info = "Not supported!";
181 
182 	if (board_is_odroidxu4() || board_is_odroidhc1())
183 		return info;
184 
185 	return env_get("dfu_alt_system");
186 }
187 
188 char *get_dfu_alt_boot(char *interface, char *devstr)
189 {
190 	char *info = "Not supported!";
191 	struct mmc *mmc;
192 	char *alt_boot;
193 	int dev_num;
194 
195 	if (board_is_odroidxu4() || board_is_odroidhc1())
196 		return info;
197 
198 	dev_num = simple_strtoul(devstr, NULL, 10);
199 
200 	mmc = find_mmc_device(dev_num);
201 	if (!mmc)
202 		return NULL;
203 
204 	if (mmc_init(mmc))
205 		return NULL;
206 
207 	if (IS_SD(mmc))
208 		alt_boot = CONFIG_DFU_ALT_BOOT_SD;
209 	else
210 		alt_boot = CONFIG_DFU_ALT_BOOT_EMMC;
211 
212 	return alt_boot;
213 }
214 #endif
215