1 /* 2 * (C) Copyright 2013 SAMSUNG Electronics 3 * Rajeshwari Shinde <rajeshwari.s@samsung.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #include <common.h> 9 #include <cros_ec.h> 10 #include <errno.h> 11 #include <fdtdec.h> 12 #include <spi.h> 13 #include <tmu.h> 14 #include <netdev.h> 15 #include <asm/io.h> 16 #include <asm/gpio.h> 17 #include <asm/arch/board.h> 18 #include <asm/arch/cpu.h> 19 #include <asm/arch/dwmmc.h> 20 #include <asm/arch/mmc.h> 21 #include <asm/arch/pinmux.h> 22 #include <asm/arch/power.h> 23 #include <asm/arch/system.h> 24 #include <asm/arch/sromc.h> 25 #include <lcd.h> 26 #include <i2c.h> 27 #include <usb.h> 28 #include <dwc3-uboot.h> 29 #include <samsung/misc.h> 30 #include <dm/pinctrl.h> 31 #include <dm.h> 32 33 DECLARE_GLOBAL_DATA_PTR; 34 35 __weak int exynos_early_init_f(void) 36 { 37 return 0; 38 } 39 40 __weak int exynos_power_init(void) 41 { 42 return 0; 43 } 44 45 #if defined CONFIG_EXYNOS_TMU 46 /* Boot Time Thermal Analysis for SoC temperature threshold breach */ 47 static void boot_temp_check(void) 48 { 49 int temp; 50 51 switch (tmu_monitor(&temp)) { 52 case TMU_STATUS_NORMAL: 53 break; 54 case TMU_STATUS_TRIPPED: 55 /* 56 * Status TRIPPED ans WARNING means corresponding threshold 57 * breach 58 */ 59 puts("EXYNOS_TMU: TRIPPING! Device power going down ...\n"); 60 set_ps_hold_ctrl(); 61 hang(); 62 break; 63 case TMU_STATUS_WARNING: 64 puts("EXYNOS_TMU: WARNING! Temperature very high\n"); 65 break; 66 case TMU_STATUS_INIT: 67 /* 68 * TMU_STATUS_INIT means something is wrong with temperature 69 * sensing and TMU status was changed back from NORMAL to INIT. 70 */ 71 puts("EXYNOS_TMU: WARNING! Temperature sensing not done\n"); 72 break; 73 default: 74 debug("EXYNOS_TMU: Unknown TMU state\n"); 75 } 76 } 77 #endif 78 79 int board_init(void) 80 { 81 gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL); 82 #if defined CONFIG_EXYNOS_TMU 83 if (tmu_init(gd->fdt_blob) != TMU_STATUS_NORMAL) { 84 debug("%s: Failed to init TMU\n", __func__); 85 return -1; 86 } 87 boot_temp_check(); 88 #endif 89 #ifdef CONFIG_TZSW_RESERVED_DRAM_SIZE 90 /* The last few MB of memory can be reserved for secure firmware */ 91 ulong size = CONFIG_TZSW_RESERVED_DRAM_SIZE; 92 93 gd->ram_size -= size; 94 gd->bd->bi_dram[CONFIG_NR_DRAM_BANKS - 1].size -= size; 95 #endif 96 return exynos_init(); 97 } 98 99 int dram_init(void) 100 { 101 unsigned int i; 102 unsigned long addr; 103 104 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 105 addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE); 106 gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE); 107 } 108 return 0; 109 } 110 111 void dram_init_banksize(void) 112 { 113 unsigned int i; 114 unsigned long addr, size; 115 116 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 117 addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE); 118 size = get_ram_size((long *)addr, SDRAM_BANK_SIZE); 119 120 gd->bd->bi_dram[i].start = addr; 121 gd->bd->bi_dram[i].size = size; 122 } 123 } 124 125 static int board_uart_init(void) 126 { 127 #ifndef CONFIG_PINCTRL_EXYNOS 128 int err, uart_id, ret = 0; 129 130 for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) { 131 err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE); 132 if (err) { 133 debug("UART%d not configured\n", 134 (uart_id - PERIPH_ID_UART0)); 135 ret |= err; 136 } 137 } 138 return ret; 139 #else 140 return 0; 141 #endif 142 } 143 144 #ifdef CONFIG_BOARD_EARLY_INIT_F 145 int board_early_init_f(void) 146 { 147 int err; 148 #ifdef CONFIG_BOARD_TYPES 149 set_board_type(); 150 #endif 151 err = board_uart_init(); 152 if (err) { 153 debug("UART init failed\n"); 154 return err; 155 } 156 157 #ifdef CONFIG_SYS_I2C_INIT_BOARD 158 board_i2c_init(gd->fdt_blob); 159 #endif 160 161 return exynos_early_init_f(); 162 } 163 #endif 164 165 #if defined(CONFIG_POWER) || defined(CONFIG_DM_PMIC) 166 int power_init_board(void) 167 { 168 set_ps_hold_ctrl(); 169 170 return exynos_power_init(); 171 } 172 #endif 173 174 #ifdef CONFIG_SMC911X 175 static int decode_sromc(const void *blob, struct fdt_sromc *config) 176 { 177 int err; 178 int node; 179 180 node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS5_SROMC); 181 if (node < 0) { 182 debug("Could not find SROMC node\n"); 183 return node; 184 } 185 186 config->bank = fdtdec_get_int(blob, node, "bank", 0); 187 config->width = fdtdec_get_int(blob, node, "width", 2); 188 189 err = fdtdec_get_int_array(blob, node, "srom-timing", config->timing, 190 FDT_SROM_TIMING_COUNT); 191 if (err < 0) { 192 debug("Could not decode SROMC configuration Error: %s\n", 193 fdt_strerror(err)); 194 return -FDT_ERR_NOTFOUND; 195 } 196 return 0; 197 } 198 #endif 199 200 int board_eth_init(bd_t *bis) 201 { 202 #ifdef CONFIG_SMC911X 203 u32 smc_bw_conf, smc_bc_conf; 204 struct fdt_sromc config; 205 fdt_addr_t base_addr; 206 int node; 207 208 node = decode_sromc(gd->fdt_blob, &config); 209 if (node < 0) { 210 debug("%s: Could not find sromc configuration\n", __func__); 211 return 0; 212 } 213 node = fdtdec_next_compatible(gd->fdt_blob, node, COMPAT_SMSC_LAN9215); 214 if (node < 0) { 215 debug("%s: Could not find lan9215 configuration\n", __func__); 216 return 0; 217 } 218 219 /* We now have a node, so any problems from now on are errors */ 220 base_addr = fdtdec_get_addr(gd->fdt_blob, node, "reg"); 221 if (base_addr == FDT_ADDR_T_NONE) { 222 debug("%s: Could not find lan9215 address\n", __func__); 223 return -1; 224 } 225 226 /* Ethernet needs data bus width of 16 bits */ 227 if (config.width != 2) { 228 debug("%s: Unsupported bus width %d\n", __func__, 229 config.width); 230 return -1; 231 } 232 smc_bw_conf = SROMC_DATA16_WIDTH(config.bank) 233 | SROMC_BYTE_ENABLE(config.bank); 234 235 smc_bc_conf = SROMC_BC_TACS(config.timing[FDT_SROM_TACS]) | 236 SROMC_BC_TCOS(config.timing[FDT_SROM_TCOS]) | 237 SROMC_BC_TACC(config.timing[FDT_SROM_TACC]) | 238 SROMC_BC_TCOH(config.timing[FDT_SROM_TCOH]) | 239 SROMC_BC_TAH(config.timing[FDT_SROM_TAH]) | 240 SROMC_BC_TACP(config.timing[FDT_SROM_TACP]) | 241 SROMC_BC_PMC(config.timing[FDT_SROM_PMC]); 242 243 /* Select and configure the SROMC bank */ 244 exynos_pinmux_config(PERIPH_ID_SROMC, config.bank); 245 s5p_config_sromc(config.bank, smc_bw_conf, smc_bc_conf); 246 return smc911x_initialize(0, base_addr); 247 #endif 248 return 0; 249 } 250 251 #ifdef CONFIG_GENERIC_MMC 252 static int init_mmc(void) 253 { 254 #ifdef CONFIG_SDHCI 255 return exynos_mmc_init(gd->fdt_blob); 256 #else 257 return 0; 258 #endif 259 } 260 261 static int init_dwmmc(void) 262 { 263 #ifdef CONFIG_DWMMC 264 return exynos_dwmmc_init(gd->fdt_blob); 265 #else 266 return 0; 267 #endif 268 } 269 270 int board_mmc_init(bd_t *bis) 271 { 272 int ret; 273 274 if (get_boot_mode() == BOOT_MODE_SD) { 275 ret = init_mmc(); 276 ret |= init_dwmmc(); 277 } else { 278 ret = init_dwmmc(); 279 ret |= init_mmc(); 280 } 281 282 if (ret) 283 debug("mmc init failed\n"); 284 285 return ret; 286 } 287 #endif 288 289 #ifdef CONFIG_DISPLAY_BOARDINFO 290 int checkboard(void) 291 { 292 const char *board_info; 293 294 board_info = fdt_getprop(gd->fdt_blob, 0, "model", NULL); 295 printf("Board: %s\n", board_info ? board_info : "unknown"); 296 #ifdef CONFIG_BOARD_TYPES 297 board_info = get_board_type(); 298 if (board_info) 299 printf("Type: %s\n", board_info); 300 #endif 301 return 0; 302 } 303 #endif 304 305 #ifdef CONFIG_BOARD_LATE_INIT 306 int board_late_init(void) 307 { 308 stdio_print_current_devices(); 309 310 if (cros_ec_get_error()) { 311 /* Force console on */ 312 gd->flags &= ~GD_FLG_SILENT; 313 314 printf("cros-ec communications failure %d\n", 315 cros_ec_get_error()); 316 puts("\nPlease reset with Power+Refresh\n\n"); 317 panic("Cannot init cros-ec device"); 318 return -1; 319 } 320 return 0; 321 } 322 #endif 323 324 #ifdef CONFIG_MISC_INIT_R 325 int misc_init_r(void) 326 { 327 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 328 set_board_info(); 329 #endif 330 #ifdef CONFIG_LCD_MENU 331 keys_init(); 332 check_boot_mode(); 333 #endif 334 #ifdef CONFIG_CMD_BMP 335 if (panel_info.logo_on) 336 draw_logo(); 337 #endif 338 return 0; 339 } 340 #endif 341 342 void reset_misc(void) 343 { 344 struct gpio_desc gpio = {}; 345 int node; 346 347 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, 348 "samsung,emmc-reset"); 349 if (node < 0) 350 return; 351 352 gpio_request_by_name_nodev(gd->fdt_blob, node, "reset-gpio", 0, &gpio, 353 GPIOD_IS_OUT); 354 355 if (dm_gpio_is_valid(&gpio)) { 356 /* 357 * Reset eMMC 358 * 359 * FIXME: Need to optimize delay time. Minimum 1usec pulse is 360 * required by 'JEDEC Standard No.84-A441' (eMMC) 361 * document but real delay time is expected to greater 362 * than 1usec. 363 */ 364 dm_gpio_set_value(&gpio, 0); 365 mdelay(10); 366 dm_gpio_set_value(&gpio, 1); 367 } 368 } 369 370 int board_usb_cleanup(int index, enum usb_init_type init) 371 { 372 #ifdef CONFIG_USB_DWC3 373 dwc3_uboot_exit(index); 374 #endif 375 return 0; 376 } 377