1 /* 2 * (C) Copyright 2013 SAMSUNG Electronics 3 * Rajeshwari Shinde <rajeshwari.s@samsung.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #include <common.h> 9 #include <cros_ec.h> 10 #include <errno.h> 11 #include <fdtdec.h> 12 #include <spi.h> 13 #include <tmu.h> 14 #include <netdev.h> 15 #include <asm/io.h> 16 #include <asm/gpio.h> 17 #include <asm/arch/board.h> 18 #include <asm/arch/cpu.h> 19 #include <asm/arch/dwmmc.h> 20 #include <asm/arch/mmc.h> 21 #include <asm/arch/pinmux.h> 22 #include <asm/arch/power.h> 23 #include <asm/arch/system.h> 24 #include <power/pmic.h> 25 #include <asm/arch/sromc.h> 26 #include <lcd.h> 27 #include <samsung/misc.h> 28 29 DECLARE_GLOBAL_DATA_PTR; 30 31 __weak int exynos_early_init_f(void) 32 { 33 return 0; 34 } 35 36 __weak int exynos_power_init(void) 37 { 38 return 0; 39 } 40 41 #if defined CONFIG_EXYNOS_TMU 42 /* Boot Time Thermal Analysis for SoC temperature threshold breach */ 43 static void boot_temp_check(void) 44 { 45 int temp; 46 47 switch (tmu_monitor(&temp)) { 48 case TMU_STATUS_NORMAL: 49 break; 50 case TMU_STATUS_TRIPPED: 51 /* 52 * Status TRIPPED ans WARNING means corresponding threshold 53 * breach 54 */ 55 puts("EXYNOS_TMU: TRIPPING! Device power going down ...\n"); 56 set_ps_hold_ctrl(); 57 hang(); 58 break; 59 case TMU_STATUS_WARNING: 60 puts("EXYNOS_TMU: WARNING! Temperature very high\n"); 61 break; 62 case TMU_STATUS_INIT: 63 /* 64 * TMU_STATUS_INIT means something is wrong with temperature 65 * sensing and TMU status was changed back from NORMAL to INIT. 66 */ 67 puts("EXYNOS_TMU: WARNING! Temperature sensing not done\n"); 68 break; 69 default: 70 debug("EXYNOS_TMU: Unknown TMU state\n"); 71 } 72 } 73 #endif 74 75 int board_init(void) 76 { 77 gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL); 78 #if defined CONFIG_EXYNOS_TMU 79 if (tmu_init(gd->fdt_blob) != TMU_STATUS_NORMAL) { 80 debug("%s: Failed to init TMU\n", __func__); 81 return -1; 82 } 83 boot_temp_check(); 84 #endif 85 86 return exynos_init(); 87 } 88 89 int dram_init(void) 90 { 91 int i; 92 u32 addr; 93 94 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 95 addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE); 96 gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE); 97 } 98 return 0; 99 } 100 101 void dram_init_banksize(void) 102 { 103 int i; 104 u32 addr, size; 105 106 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 107 addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE); 108 size = get_ram_size((long *)addr, SDRAM_BANK_SIZE); 109 110 gd->bd->bi_dram[i].start = addr; 111 gd->bd->bi_dram[i].size = size; 112 } 113 } 114 115 static int board_uart_init(void) 116 { 117 int err, uart_id, ret = 0; 118 119 for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) { 120 err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE); 121 if (err) { 122 debug("UART%d not configured\n", 123 (uart_id - PERIPH_ID_UART0)); 124 ret |= err; 125 } 126 } 127 return ret; 128 } 129 130 #ifdef CONFIG_BOARD_EARLY_INIT_F 131 int board_early_init_f(void) 132 { 133 int err; 134 #ifdef CONFIG_BOARD_TYPES 135 set_board_type(); 136 #endif 137 err = board_uart_init(); 138 if (err) { 139 debug("UART init failed\n"); 140 return err; 141 } 142 143 #ifdef CONFIG_SYS_I2C_INIT_BOARD 144 board_i2c_init(gd->fdt_blob); 145 #endif 146 147 #if defined(CONFIG_OF_CONTROL) && defined(CONFIG_EXYNOS_FB) 148 /* 149 * board_init_f(arch/arm/lib/board.c) calls lcd_setmem() which needs 150 * panel_info.vl_col, panel_info.vl_row and panel_info.vl_bpix, to reserve 151 * FB memory at a very early stage. So, we need to fill panel_info.vl_col, 152 * panel_info.vl_row and panel_info.vl_bpix before lcd_setmem() is called. 153 */ 154 err = exynos_lcd_early_init(gd->fdt_blob); 155 if (err) { 156 debug("LCD early init failed\n"); 157 return err; 158 } 159 #endif 160 161 return exynos_early_init_f(); 162 } 163 #endif 164 165 #if defined(CONFIG_POWER) 166 int power_init_board(void) 167 { 168 set_ps_hold_ctrl(); 169 170 return exynos_power_init(); 171 } 172 #endif 173 174 #ifdef CONFIG_OF_CONTROL 175 #ifdef CONFIG_SMC911X 176 static int decode_sromc(const void *blob, struct fdt_sromc *config) 177 { 178 int err; 179 int node; 180 181 node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS5_SROMC); 182 if (node < 0) { 183 debug("Could not find SROMC node\n"); 184 return node; 185 } 186 187 config->bank = fdtdec_get_int(blob, node, "bank", 0); 188 config->width = fdtdec_get_int(blob, node, "width", 2); 189 190 err = fdtdec_get_int_array(blob, node, "srom-timing", config->timing, 191 FDT_SROM_TIMING_COUNT); 192 if (err < 0) { 193 debug("Could not decode SROMC configuration Error: %s\n", 194 fdt_strerror(err)); 195 return -FDT_ERR_NOTFOUND; 196 } 197 return 0; 198 } 199 #endif 200 201 int board_eth_init(bd_t *bis) 202 { 203 #ifdef CONFIG_SMC911X 204 u32 smc_bw_conf, smc_bc_conf; 205 struct fdt_sromc config; 206 fdt_addr_t base_addr; 207 int node; 208 209 node = decode_sromc(gd->fdt_blob, &config); 210 if (node < 0) { 211 debug("%s: Could not find sromc configuration\n", __func__); 212 return 0; 213 } 214 node = fdtdec_next_compatible(gd->fdt_blob, node, COMPAT_SMSC_LAN9215); 215 if (node < 0) { 216 debug("%s: Could not find lan9215 configuration\n", __func__); 217 return 0; 218 } 219 220 /* We now have a node, so any problems from now on are errors */ 221 base_addr = fdtdec_get_addr(gd->fdt_blob, node, "reg"); 222 if (base_addr == FDT_ADDR_T_NONE) { 223 debug("%s: Could not find lan9215 address\n", __func__); 224 return -1; 225 } 226 227 /* Ethernet needs data bus width of 16 bits */ 228 if (config.width != 2) { 229 debug("%s: Unsupported bus width %d\n", __func__, 230 config.width); 231 return -1; 232 } 233 smc_bw_conf = SROMC_DATA16_WIDTH(config.bank) 234 | SROMC_BYTE_ENABLE(config.bank); 235 236 smc_bc_conf = SROMC_BC_TACS(config.timing[FDT_SROM_TACS]) | 237 SROMC_BC_TCOS(config.timing[FDT_SROM_TCOS]) | 238 SROMC_BC_TACC(config.timing[FDT_SROM_TACC]) | 239 SROMC_BC_TCOH(config.timing[FDT_SROM_TCOH]) | 240 SROMC_BC_TAH(config.timing[FDT_SROM_TAH]) | 241 SROMC_BC_TACP(config.timing[FDT_SROM_TACP]) | 242 SROMC_BC_PMC(config.timing[FDT_SROM_PMC]); 243 244 /* Select and configure the SROMC bank */ 245 exynos_pinmux_config(PERIPH_ID_SROMC, config.bank); 246 s5p_config_sromc(config.bank, smc_bw_conf, smc_bc_conf); 247 return smc911x_initialize(0, base_addr); 248 #endif 249 return 0; 250 } 251 252 #ifdef CONFIG_GENERIC_MMC 253 static int init_mmc(void) 254 { 255 #ifdef CONFIG_SDHCI 256 return exynos_mmc_init(gd->fdt_blob); 257 #else 258 return 0; 259 #endif 260 } 261 262 static int init_dwmmc(void) 263 { 264 #ifdef CONFIG_DWMMC 265 return exynos_dwmmc_init(gd->fdt_blob); 266 #else 267 return 0; 268 #endif 269 } 270 271 int board_mmc_init(bd_t *bis) 272 { 273 int ret; 274 275 if (get_boot_mode() == BOOT_MODE_SD) { 276 ret = init_mmc(); 277 ret |= init_dwmmc(); 278 } else { 279 ret = init_dwmmc(); 280 ret |= init_mmc(); 281 } 282 283 if (ret) 284 debug("mmc init failed\n"); 285 286 return ret; 287 } 288 #endif 289 290 #ifdef CONFIG_DISPLAY_BOARDINFO 291 int checkboard(void) 292 { 293 const char *board_info; 294 295 board_info = fdt_getprop(gd->fdt_blob, 0, "model", NULL); 296 printf("Board: %s\n", board_info ? board_info : "unknown"); 297 #ifdef CONFIG_BOARD_TYPES 298 board_info = get_board_type(); 299 300 printf("Model: %s\n", board_info ? board_info : "unknown"); 301 #endif 302 return 0; 303 } 304 #endif 305 #endif /* CONFIG_OF_CONTROL */ 306 307 #ifdef CONFIG_BOARD_LATE_INIT 308 int board_late_init(void) 309 { 310 stdio_print_current_devices(); 311 312 if (cros_ec_get_error()) { 313 /* Force console on */ 314 gd->flags &= ~GD_FLG_SILENT; 315 316 printf("cros-ec communications failure %d\n", 317 cros_ec_get_error()); 318 puts("\nPlease reset with Power+Refresh\n\n"); 319 panic("Cannot init cros-ec device"); 320 return -1; 321 } 322 return 0; 323 } 324 #endif 325 326 int arch_early_init_r(void) 327 { 328 #ifdef CONFIG_CROS_EC 329 if (cros_ec_board_init()) { 330 printf("%s: Failed to init EC\n", __func__); 331 return 0; 332 } 333 #endif 334 335 return 0; 336 } 337 338 #ifdef CONFIG_MISC_INIT_R 339 int misc_init_r(void) 340 { 341 #ifdef CONFIG_SET_DFU_ALT_INFO 342 set_dfu_alt_info(); 343 #endif 344 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 345 set_board_info(); 346 #endif 347 #ifdef CONFIG_LCD_MENU 348 keys_init(); 349 check_boot_mode(); 350 #endif 351 #ifdef CONFIG_CMD_BMP 352 if (panel_info.logo_on) 353 draw_logo(); 354 #endif 355 return 0; 356 } 357 #endif 358 359 void reset_misc(void) 360 { 361 struct gpio_desc gpio = {}; 362 int node; 363 364 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, 365 "samsung,emmc-reset"); 366 if (node < 0) 367 return; 368 369 gpio_request_by_name_nodev(gd->fdt_blob, node, "reset-gpio", 0, &gpio, 370 GPIOD_IS_OUT); 371 372 if (dm_gpio_is_valid(&gpio)) { 373 /* 374 * Reset eMMC 375 * 376 * FIXME: Need to optimize delay time. Minimum 1usec pulse is 377 * required by 'JEDEC Standard No.84-A441' (eMMC) 378 * document but real delay time is expected to greater 379 * than 1usec. 380 */ 381 dm_gpio_set_value(&gpio, 0); 382 mdelay(10); 383 dm_gpio_set_value(&gpio, 1); 384 } 385 } 386