1 /* 2 * (C) Copyright 2010 3 * Ilko Iliev <iliev@ronetix.at> 4 * Asen Dimov <dimov@ronetix.at> 5 * Ronetix GmbH <www.ronetix.at> 6 * 7 * (C) Copyright 2007-2008 8 * Stelian Pop <stelian@popies.net> 9 * Lead Tech Design <www.leadtechdesign.com> 10 * 11 * SPDX-License-Identifier: GPL-2.0+ 12 */ 13 14 #include <common.h> 15 #include <linux/sizes.h> 16 #include <asm/io.h> 17 #include <asm/gpio.h> 18 #include <asm/arch/at91sam9_smc.h> 19 #include <asm/arch/at91_common.h> 20 #include <asm/arch/at91_rstc.h> 21 #include <asm/arch/at91_matrix.h> 22 #include <asm/arch/gpio.h> 23 #include <asm/arch/clk.h> 24 #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) 25 #include <net.h> 26 #endif 27 #include <netdev.h> 28 29 DECLARE_GLOBAL_DATA_PTR; 30 31 /* 32 * Miscelaneous platform dependent initialisations 33 */ 34 35 #ifdef CONFIG_CMD_NAND 36 static void pm9g45_nand_hw_init(void) 37 { 38 unsigned long csa; 39 struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; 40 struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; 41 42 /* Enable CS3 */ 43 csa = readl(&matrix->ccr[6]) | AT91_MATRIX_CSA_EBI_CS3A; 44 writel(csa, &matrix->ccr[6]); 45 46 /* Configure SMC CS3 for NAND/SmartMedia */ 47 writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) | 48 AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0), 49 &smc->cs[3].setup); 50 51 writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(3) | 52 AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(2), 53 &smc->cs[3].pulse); 54 55 writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(4), 56 &smc->cs[3].cycle); 57 58 writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | 59 AT91_SMC_MODE_EXNW_DISABLE | 60 AT91_SMC_MODE_DBW_8 | 61 AT91_SMC_MODE_TDF_CYCLE(3), 62 &smc->cs[3].mode); 63 64 at91_periph_clk_enable(ATMEL_ID_PIOC); 65 66 #ifdef CONFIG_SYS_NAND_READY_PIN 67 /* Configure RDY/BSY */ 68 gpio_direction_input(CONFIG_SYS_NAND_READY_PIN); 69 #endif 70 71 /* Enable NandFlash */ 72 gpio_direction_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); 73 } 74 #endif 75 76 #ifdef CONFIG_MACB 77 static void pm9g45_macb_hw_init(void) 78 { 79 /* 80 * PD2 enables the 50MHz oscillator for Ethernet PHY 81 * 1 - enable 82 * 0 - disable 83 */ 84 at91_set_pio_output(AT91_PIO_PORTD, 2, 1); 85 at91_set_pio_value(AT91_PIO_PORTD, 2, 1); /* 1- enable, 0 - disable */ 86 87 at91_periph_clk_enable(ATMEL_ID_EMAC); 88 89 /* 90 * Disable pull-up on: 91 * RXDV (PA15) => PHY normal mode (not Test mode) 92 * ERX0 (PA12) => PHY ADDR0 93 * ERX1 (PA13) => PHY ADDR1 => PHYADDR = 0x0 94 * 95 * PHY has internal pull-down 96 */ 97 at91_set_pio_pullup(AT91_PIO_PORTA, 15, 0); 98 at91_set_pio_pullup(AT91_PIO_PORTA, 12, 0); 99 at91_set_pio_pullup(AT91_PIO_PORTA, 13, 0); 100 101 /* Re-enable pull-up */ 102 at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1); 103 at91_set_pio_pullup(AT91_PIO_PORTA, 12, 1); 104 at91_set_pio_pullup(AT91_PIO_PORTA, 13, 1); 105 106 at91_macb_hw_init(); 107 } 108 #endif 109 110 int board_early_init_f(void) 111 { 112 at91_periph_clk_enable(ATMEL_ID_PIOA); 113 at91_periph_clk_enable(ATMEL_ID_PIOB); 114 at91_periph_clk_enable(ATMEL_ID_PIOC); 115 at91_periph_clk_enable(ATMEL_ID_PIODE); 116 117 at91_seriald_hw_init(); 118 119 return 0; 120 } 121 122 int board_init(void) 123 { 124 /* arch number of AT91SAM9M10G45EK-Board */ 125 gd->bd->bi_arch_number = MACH_TYPE_PM9G45; 126 /* adress of boot parameters */ 127 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; 128 129 #ifdef CONFIG_CMD_NAND 130 pm9g45_nand_hw_init(); 131 #endif 132 133 #ifdef CONFIG_MACB 134 pm9g45_macb_hw_init(); 135 #endif 136 return 0; 137 } 138 139 int dram_init(void) 140 { 141 /* dram_init must store complete ramsize in gd->ram_size */ 142 gd->ram_size = get_ram_size((void *)PHYS_SDRAM, 143 PHYS_SDRAM_SIZE); 144 return 0; 145 } 146 147 int dram_init_banksize(void) 148 { 149 gd->bd->bi_dram[0].start = PHYS_SDRAM; 150 gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; 151 152 return 0; 153 } 154 155 #ifdef CONFIG_RESET_PHY_R 156 void reset_phy(void) 157 { 158 #ifdef CONFIG_MACB 159 /* 160 * Initialize ethernet HW addr prior to starting Linux, 161 * needed for nfsroot 162 */ 163 eth_init(); 164 #endif 165 } 166 #endif 167 168 int board_eth_init(bd_t *bis) 169 { 170 int rc = 0; 171 #ifdef CONFIG_MACB 172 rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x01); 173 #endif 174 return rc; 175 } 176