1 /* 2 * (C) Copyright 2010 3 * Ilko Iliev <iliev@ronetix.at> 4 * Asen Dimov <dimov@ronetix.at> 5 * Ronetix GmbH <www.ronetix.at> 6 * 7 * (C) Copyright 2007-2008 8 * Stelian Pop <stelian.pop@leadtechdesign.com> 9 * Lead Tech Design <www.leadtechdesign.com> 10 * 11 * See file CREDITS for list of people who contributed to this 12 * project. 13 * 14 * This program is free software; you can redistribute it and/or 15 * modify it under the terms of the GNU General Public License as 16 * published by the Free Software Foundation; either version 2 of 17 * the License, or (at your option) any later version. 18 * 19 * This program is distributed in the hope that it will be useful, 20 * but WITHOUT ANY WARRANTY; without even the implied warranty of 21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 22 * GNU General Public License for more details. 23 * 24 * You should have received a copy of the GNU General Public License 25 * along with this program; if not, write to the Free Software 26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 27 * MA 02111-1307 USA 28 */ 29 30 #include <common.h> 31 #include <asm/sizes.h> 32 #include <asm/io.h> 33 #include <asm/arch/at91sam9_smc.h> 34 #include <asm/arch/at91_common.h> 35 #include <asm/arch/at91_pmc.h> 36 #include <asm/arch/at91_rstc.h> 37 #include <asm/arch/at91_matrix.h> 38 #include <asm/arch/gpio.h> 39 #include <asm/arch/clk.h> 40 #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) 41 #include <net.h> 42 #endif 43 #include <netdev.h> 44 45 DECLARE_GLOBAL_DATA_PTR; 46 47 /* 48 * Miscelaneous platform dependent initialisations 49 */ 50 51 #ifdef CONFIG_CMD_NAND 52 static void pm9g45_nand_hw_init(void) 53 { 54 unsigned long csa; 55 struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; 56 struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; 57 struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; 58 59 /* Enable CS3 */ 60 csa = readl(&matrix->ccr[6]) | AT91_MATRIX_CSA_EBI_CS3A; 61 writel(csa, &matrix->ccr[6]); 62 63 /* Configure SMC CS3 for NAND/SmartMedia */ 64 writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) | 65 AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0), 66 &smc->cs[3].setup); 67 68 writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(3) | 69 AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(2), 70 &smc->cs[3].pulse); 71 72 writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(4), 73 &smc->cs[3].cycle); 74 75 writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | 76 AT91_SMC_MODE_EXNW_DISABLE | 77 AT91_SMC_MODE_DBW_8 | 78 AT91_SMC_MODE_TDF_CYCLE(3), 79 &smc->cs[3].mode); 80 81 writel(1 << ATMEL_ID_PIOC, &pmc->pcer); 82 83 #ifdef CONFIG_SYS_NAND_READY_PIN 84 /* Configure RDY/BSY */ 85 at91_set_pio_input(CONFIG_SYS_NAND_READY_PIN, 1); 86 #endif 87 88 /* Enable NandFlash */ 89 at91_set_pio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); 90 } 91 #endif 92 93 #ifdef CONFIG_MACB 94 static void pm9g45_macb_hw_init(void) 95 { 96 struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; 97 98 /* 99 * PD2 enables the 50MHz oscillator for Ethernet PHY 100 * 1 - enable 101 * 0 - disable 102 */ 103 at91_set_pio_output(AT91_PIO_PORTD, 2, 1); 104 at91_set_pio_value(AT91_PIO_PORTD, 2, 1); /* 1- enable, 0 - disable */ 105 106 /* Enable clock */ 107 writel(1 << ATMEL_ID_EMAC, &pmc->pcer); 108 109 /* 110 * Disable pull-up on: 111 * RXDV (PA15) => PHY normal mode (not Test mode) 112 * ERX0 (PA12) => PHY ADDR0 113 * ERX1 (PA13) => PHY ADDR1 => PHYADDR = 0x0 114 * 115 * PHY has internal pull-down 116 */ 117 at91_set_pio_pullup(AT91_PIO_PORTA, 15, 0); 118 at91_set_pio_pullup(AT91_PIO_PORTA, 12, 0); 119 at91_set_pio_pullup(AT91_PIO_PORTA, 13, 0); 120 121 /* Re-enable pull-up */ 122 at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1); 123 at91_set_pio_pullup(AT91_PIO_PORTA, 12, 1); 124 at91_set_pio_pullup(AT91_PIO_PORTA, 13, 1); 125 126 at91_macb_hw_init(); 127 } 128 #endif 129 130 int board_init(void) 131 { 132 struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; 133 134 /* Enable Ctrlc */ 135 console_init_f(); 136 137 writel((1 << ATMEL_ID_PIOA) | 138 (1 << ATMEL_ID_PIOB) | 139 (1 << ATMEL_ID_PIOC) | 140 (1 << ATMEL_ID_PIODE), &pmc->pcer); 141 142 /* arch number of AT91SAM9M10G45EK-Board */ 143 gd->bd->bi_arch_number = MACH_TYPE_PM9G45; 144 /* adress of boot parameters */ 145 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; 146 147 at91_seriald_hw_init(); 148 #ifdef CONFIG_CMD_NAND 149 pm9g45_nand_hw_init(); 150 #endif 151 152 #ifdef CONFIG_MACB 153 pm9g45_macb_hw_init(); 154 #endif 155 return 0; 156 } 157 158 int dram_init(void) 159 { 160 /* dram_init must store complete ramsize in gd->ram_size */ 161 gd->ram_size = get_ram_size((void *)PHYS_SDRAM, 162 PHYS_SDRAM_SIZE); 163 return 0; 164 } 165 166 void dram_init_banksize(void) 167 { 168 gd->bd->bi_dram[0].start = PHYS_SDRAM; 169 gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; 170 } 171 172 #ifdef CONFIG_RESET_PHY_R 173 void reset_phy(void) 174 { 175 #ifdef CONFIG_MACB 176 /* 177 * Initialize ethernet HW addr prior to starting Linux, 178 * needed for nfsroot 179 */ 180 eth_init(gd->bd); 181 #endif 182 } 183 #endif 184 185 int board_eth_init(bd_t *bis) 186 { 187 int rc = 0; 188 #ifdef CONFIG_MACB 189 rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x01); 190 #endif 191 return rc; 192 } 193