1*c418addfSKever Yang /*
2*c418addfSKever Yang  * (C) Copyright 2015 Rockchip Electronics Co., Ltd
3*c418addfSKever Yang  *
4*c418addfSKever Yang  * SPDX-License-Identifier:     GPL-2.0+
5*c418addfSKever Yang  */
6*c418addfSKever Yang 
7*c418addfSKever Yang #include <common.h>
8*c418addfSKever Yang #include <dm.h>
9*c418addfSKever Yang #include <asm/io.h>
10*c418addfSKever Yang #include <asm/arch/uart.h>
11*c418addfSKever Yang #include <asm/arch-rockchip/grf_rk3036.h>
12*c418addfSKever Yang #include <asm/arch/sdram_rk3036.h>
13*c418addfSKever Yang #include <asm/gpio.h>
14*c418addfSKever Yang 
15*c418addfSKever Yang DECLARE_GLOBAL_DATA_PTR;
16*c418addfSKever Yang 
17*c418addfSKever Yang #define GRF_BASE	0x20008000
18*c418addfSKever Yang 
19*c418addfSKever Yang void get_ddr_config(struct rk3036_ddr_config *config)
20*c418addfSKever Yang {
21*c418addfSKever Yang 	/* K4B4G1646Q config */
22*c418addfSKever Yang 	config->ddr_type = 3;
23*c418addfSKever Yang 	config->rank = 1;
24*c418addfSKever Yang 	config->cs0_row = 15;
25*c418addfSKever Yang 	config->cs1_row = 15;
26*c418addfSKever Yang 
27*c418addfSKever Yang 	/* 8bank */
28*c418addfSKever Yang 	config->bank = 3;
29*c418addfSKever Yang 	config->col = 10;
30*c418addfSKever Yang 
31*c418addfSKever Yang 	/* 16bit bw */
32*c418addfSKever Yang 	config->bw = 1;
33*c418addfSKever Yang }
34*c418addfSKever Yang 
35*c418addfSKever Yang #define FASTBOOT_KEY_GPIO 93
36*c418addfSKever Yang 
37*c418addfSKever Yang int fastboot_key_pressed(void)
38*c418addfSKever Yang {
39*c418addfSKever Yang 	gpio_request(FASTBOOT_KEY_GPIO, "fastboot_key");
40*c418addfSKever Yang 	gpio_direction_input(FASTBOOT_KEY_GPIO);
41*c418addfSKever Yang 	return !gpio_get_value(FASTBOOT_KEY_GPIO);
42*c418addfSKever Yang }
43*c418addfSKever Yang 
44*c418addfSKever Yang #define ROCKCHIP_BOOT_MODE_FASTBOOT	0x5242C309
45*c418addfSKever Yang 
46*c418addfSKever Yang int board_late_init(void)
47*c418addfSKever Yang {
48*c418addfSKever Yang 	struct rk3036_grf * const grf = (void *)GRF_BASE;
49*c418addfSKever Yang 	int boot_mode = readl(&grf->os_reg[4]);
50*c418addfSKever Yang 
51*c418addfSKever Yang 	/* Clear boot mode */
52*c418addfSKever Yang 	writel(0, &grf->os_reg[4]);
53*c418addfSKever Yang 
54*c418addfSKever Yang 	if (boot_mode == ROCKCHIP_BOOT_MODE_FASTBOOT ||
55*c418addfSKever Yang 	    fastboot_key_pressed()) {
56*c418addfSKever Yang 		printf("enter fastboot!\n");
57*c418addfSKever Yang 		setenv("preboot", "setenv preboot; fastboot usb0");
58*c418addfSKever Yang 	}
59*c418addfSKever Yang 
60*c418addfSKever Yang 	return 0;
61*c418addfSKever Yang }
62*c418addfSKever Yang 
63*c418addfSKever Yang int board_init(void)
64*c418addfSKever Yang {
65*c418addfSKever Yang 	return 0;
66*c418addfSKever Yang }
67*c418addfSKever Yang 
68*c418addfSKever Yang int dram_init(void)
69*c418addfSKever Yang {
70*c418addfSKever Yang 	gd->ram_size = sdram_size();
71*c418addfSKever Yang 
72*c418addfSKever Yang 	return 0;
73*c418addfSKever Yang }
74*c418addfSKever Yang 
75*c418addfSKever Yang #ifndef CONFIG_SYS_DCACHE_OFF
76*c418addfSKever Yang void enable_caches(void)
77*c418addfSKever Yang {
78*c418addfSKever Yang 	/* Enable D-cache. I-cache is already enabled in start.S */
79*c418addfSKever Yang 	dcache_enable();
80*c418addfSKever Yang }
81*c418addfSKever Yang #endif
82