1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+ 22d1951feSAndy Yan /* 32d1951feSAndy Yan * (C)Copyright 2016 Rockchip Electronics Co., Ltd 42d1951feSAndy Yan * Authors: Andy Yan <andy.yan@rock-chips.com> 52d1951feSAndy Yan */ 62d1951feSAndy Yan 72d1951feSAndy Yan #include <common.h> 82d1951feSAndy Yan #include <asm/io.h> 92d1951feSAndy Yan #include <fdtdec.h> 102d1951feSAndy Yan #include <asm/arch/grf_rv1108.h> 112d1951feSAndy Yan #include <asm/arch/hardware.h> 122d1951feSAndy Yan 132d1951feSAndy Yan DECLARE_GLOBAL_DATA_PTR; 142d1951feSAndy Yan 152d1951feSAndy Yan int mach_cpu_init(void) 162d1951feSAndy Yan { 172d1951feSAndy Yan int node; 182d1951feSAndy Yan struct rv1108_grf *grf; 1977c42611SDavid Wu enum { 2077c42611SDavid Wu GPIO3C3_SHIFT = 6, 2177c42611SDavid Wu GPIO3C3_MASK = 3 << GPIO3C3_SHIFT, 2277c42611SDavid Wu 2377c42611SDavid Wu GPIO3C2_SHIFT = 4, 2477c42611SDavid Wu GPIO3C2_MASK = 3 << GPIO3C2_SHIFT, 2577c42611SDavid Wu 2677c42611SDavid Wu GPIO2D2_SHIFT = 4, 2777c42611SDavid Wu GPIO2D2_MASK = 3 << GPIO2D2_SHIFT, 2877c42611SDavid Wu GPIO2D2_GPIO = 0, 2977c42611SDavid Wu GPIO2D2_UART2_SOUT_M0, 3077c42611SDavid Wu 3177c42611SDavid Wu GPIO2D1_SHIFT = 2, 3277c42611SDavid Wu GPIO2D1_MASK = 3 << GPIO2D1_SHIFT, 3377c42611SDavid Wu GPIO2D1_GPIO = 0, 3477c42611SDavid Wu GPIO2D1_UART2_SIN_M0, 3577c42611SDavid Wu }; 362d1951feSAndy Yan 372d1951feSAndy Yan node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, "rockchip,rv1108-grf"); 382d1951feSAndy Yan grf = (struct rv1108_grf *)fdtdec_get_addr(gd->fdt_blob, node, "reg"); 392d1951feSAndy Yan 402d1951feSAndy Yan /*evb board use UART2 m0 for debug*/ 412d1951feSAndy Yan rk_clrsetreg(&grf->gpio2d_iomux, 422d1951feSAndy Yan GPIO2D2_MASK | GPIO2D1_MASK, 432d1951feSAndy Yan GPIO2D2_UART2_SOUT_M0 << GPIO2D2_SHIFT | 442d1951feSAndy Yan GPIO2D1_UART2_SIN_M0 << GPIO2D1_SHIFT); 452d1951feSAndy Yan rk_clrreg(&grf->gpio3c_iomux, GPIO3C3_MASK | GPIO3C2_MASK); 462d1951feSAndy Yan 472d1951feSAndy Yan return 0; 482d1951feSAndy Yan } 492d1951feSAndy Yan 502d1951feSAndy Yan 512d1951feSAndy Yan int board_init(void) 522d1951feSAndy Yan { 532d1951feSAndy Yan return 0; 542d1951feSAndy Yan } 552d1951feSAndy Yan 562d1951feSAndy Yan int dram_init(void) 572d1951feSAndy Yan { 582d1951feSAndy Yan gd->ram_size = 0x8000000; 592d1951feSAndy Yan 602d1951feSAndy Yan return 0; 612d1951feSAndy Yan } 622d1951feSAndy Yan 632d1951feSAndy Yan int dram_init_banksize(void) 642d1951feSAndy Yan { 652d1951feSAndy Yan gd->bd->bi_dram[0].start = 0x60000000; 662d1951feSAndy Yan gd->bd->bi_dram[0].size = 0x8000000; 672d1951feSAndy Yan 682d1951feSAndy Yan return 0; 692d1951feSAndy Yan } 70