1 /*
2  * (C) Copyright 2015 Rockchip Electronics Co., Ltd
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  */
6 
7 #include <common.h>
8 #include <dm.h>
9 #include <asm/io.h>
10 #include <asm/arch/uart.h>
11 #include <asm/arch/sdram_rk3036.h>
12 
13 DECLARE_GLOBAL_DATA_PTR;
14 
15 void get_ddr_config(struct rk3036_ddr_config *config)
16 {
17 	/* K4B4G1646Q config */
18 	config->ddr_type = 3;
19 	config->rank = 2;
20 	config->cs0_row = 15;
21 	config->cs1_row = 15;
22 
23 	/* 8bank */
24 	config->bank = 3;
25 	config->col = 10;
26 
27 	/* 16bit bw */
28 	config->bw = 1;
29 }
30 
31 int board_init(void)
32 {
33 	return 0;
34 }
35 
36 int dram_init(void)
37 {
38 	gd->ram_size = sdram_size();
39 
40 	return 0;
41 }
42 
43 #ifndef CONFIG_SYS_DCACHE_OFF
44 void enable_caches(void)
45 {
46 	/* Enable D-cache. I-cache is already enabled in start.S */
47 	dcache_enable();
48 }
49 #endif
50 
51 #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
52 #include <usb.h>
53 #include <usb/dwc2_udc.h>
54 
55 static struct dwc2_plat_otg_data rk3036_otg_data = {
56 	.rx_fifo_sz	= 512,
57 	.np_tx_fifo_sz	= 16,
58 	.tx_fifo_sz	= 128,
59 };
60 
61 int board_usb_init(int index, enum usb_init_type init)
62 {
63 	int node;
64 	const char *mode;
65 	bool matched = false;
66 	const void *blob = gd->fdt_blob;
67 
68 	/* find the usb_otg node */
69 	node = fdt_node_offset_by_compatible(blob, -1,
70 					"rockchip,rk3288-usb");
71 
72 	while (node > 0) {
73 		mode = fdt_getprop(blob, node, "dr_mode", NULL);
74 		if (mode && strcmp(mode, "otg") == 0) {
75 			matched = true;
76 			break;
77 		}
78 
79 		node = fdt_node_offset_by_compatible(blob, node,
80 					"rockchip,rk3288-usb");
81 	}
82 	if (!matched) {
83 		debug("Not found usb_otg device\n");
84 		return -ENODEV;
85 	}
86 	rk3036_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
87 
88 	return dwc2_udc_probe(&rk3036_otg_data);
89 }
90 
91 int board_usb_cleanup(int index, enum usb_init_type init)
92 {
93 	return 0;
94 }
95 #endif
96