xref: /openbmc/u-boot/board/renesas/ulcb/ulcb.c (revision dd1033e4)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * board/renesas/ulcb/ulcb.c
4  *     This file is ULCB board support.
5  *
6  * Copyright (C) 2017 Renesas Electronics Corporation
7  */
8 
9 #include <common.h>
10 #include <malloc.h>
11 #include <netdev.h>
12 #include <dm.h>
13 #include <dm/platform_data/serial_sh.h>
14 #include <asm/processor.h>
15 #include <asm/mach-types.h>
16 #include <asm/io.h>
17 #include <linux/errno.h>
18 #include <asm/arch/sys_proto.h>
19 #include <asm/gpio.h>
20 #include <asm/arch/gpio.h>
21 #include <asm/arch/rmobile.h>
22 #include <asm/arch/rcar-mstp.h>
23 #include <asm/arch/sh_sdhi.h>
24 #include <i2c.h>
25 #include <mmc.h>
26 
27 DECLARE_GLOBAL_DATA_PTR;
28 
29 void s_init(void)
30 {
31 }
32 
33 #define DVFS_MSTP926		BIT(26)
34 #define HSUSB_MSTP704		BIT(4)	/* HSUSB */
35 
36 int board_early_init_f(void)
37 {
38 #if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
39 	/* DVFS for reset */
40 	mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
41 #endif
42 	return 0;
43 }
44 
45 /* HSUSB block registers */
46 #define HSUSB_REG_LPSTS			0xE6590102
47 #define HSUSB_REG_LPSTS_SUSPM_NORMAL	BIT(14)
48 #define HSUSB_REG_UGCTRL2		0xE6590184
49 #define HSUSB_REG_UGCTRL2_USB0SEL	0x30
50 #define HSUSB_REG_UGCTRL2_USB0SEL_EHCI	0x10
51 
52 int board_init(void)
53 {
54 	/* adress of boot parameters */
55 	gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000;
56 
57 	/* USB1 pull-up */
58 	setbits_le32(PFC_PUEN6, PUEN_USB1_OVC | PUEN_USB1_PWEN);
59 
60 	/* Configure the HSUSB block */
61 	mstp_clrbits_le32(SMSTPCR7, SMSTPCR7, HSUSB_MSTP704);
62 	/* Choice USB0SEL */
63 	clrsetbits_le32(HSUSB_REG_UGCTRL2, HSUSB_REG_UGCTRL2_USB0SEL,
64 			HSUSB_REG_UGCTRL2_USB0SEL_EHCI);
65 	/* low power status */
66 	setbits_le16(HSUSB_REG_LPSTS, HSUSB_REG_LPSTS_SUSPM_NORMAL);
67 
68 	return 0;
69 }
70 
71 int dram_init(void)
72 {
73 	if (fdtdec_setup_mem_size_base() != 0)
74 		return -EINVAL;
75 
76 	return 0;
77 }
78 
79 int dram_init_banksize(void)
80 {
81 	fdtdec_setup_memory_banksize();
82 
83 	return 0;
84 }
85 
86 #ifdef CONFIG_MULTI_DTB_FIT
87 int board_fit_config_name_match(const char *name)
88 {
89 	/* PRR driver is not available yet */
90 	u32 cpu_type = rmobile_get_cpu_type();
91 
92 	if ((cpu_type == RMOBILE_CPU_TYPE_R8A7795) &&
93 	    !strcmp(name, "r8a7795-h3ulcb-u-boot"))
94 		return 0;
95 
96 	if ((cpu_type == RMOBILE_CPU_TYPE_R8A7796) &&
97 	    !strcmp(name, "r8a7796-m3ulcb-u-boot"))
98 		return 0;
99 
100 	return -1;
101 }
102 #endif
103