xref: /openbmc/u-boot/board/renesas/stout/cpld.h (revision 21871138)
1*21871138SVladimir Barinov /*
2*21871138SVladimir Barinov  * Stout board CPLD definition
3*21871138SVladimir Barinov  *
4*21871138SVladimir Barinov  * Copyright (C) 2015 Renesas Electronics Europe GmbH
5*21871138SVladimir Barinov  * Copyright (C) 2015 Renesas Electronics Corporation
6*21871138SVladimir Barinov  * Copyright (C) 2015 Cogent Embedded, Inc.
7*21871138SVladimir Barinov  *
8*21871138SVladimir Barinov  * SPDX-License-Identifier: GPL-2.0
9*21871138SVladimir Barinov  */
10*21871138SVladimir Barinov 
11*21871138SVladimir Barinov #ifndef _CPLD_H_
12*21871138SVladimir Barinov #define _CPLD_H_
13*21871138SVladimir Barinov 
14*21871138SVladimir Barinov /* power-up behaviour */
15*21871138SVladimir Barinov #define MODE_MSK_FREE_RUN		0x00000001
16*21871138SVladimir Barinov #define MODE_VAL_FREE_RUN		0x00000000
17*21871138SVladimir Barinov #define MODE_MSK_STEP_UP		0x00000001
18*21871138SVladimir Barinov #define MODE_VAL_STEP_UP		0x00000000
19*21871138SVladimir Barinov 
20*21871138SVladimir Barinov /* boot source */
21*21871138SVladimir Barinov #define MODE_MSK_BOOT_SQPI_16KB_FAST	0x0000000E
22*21871138SVladimir Barinov #define MODE_VAL_BOOT_SQPI_16KB_FAST	0x00000004
23*21871138SVladimir Barinov #define MODE_MSK_BOOT_SQPI_16KB_SLOW	0x0000000E
24*21871138SVladimir Barinov #define MODE_VAL_BOOT_SQPI_16KB_SLOW	0x00000008
25*21871138SVladimir Barinov #define MODE_MSK_BOOT_SQPI_4KB_SLOW	0x0000000E
26*21871138SVladimir Barinov #define MODE_VAL_BOOT_SQPI_4KB_SLOW	0x0000000C
27*21871138SVladimir Barinov 
28*21871138SVladimir Barinov /* booting CPU */
29*21871138SVladimir Barinov #define MODE_MSK_BOOT_CA15		0x000000C0
30*21871138SVladimir Barinov #define MODE_VAL_BOOT_CA15		0x00000000
31*21871138SVladimir Barinov #define MODE_MSK_BOOT_CA7		0x000000C0
32*21871138SVladimir Barinov #define MODE_VAL_BOOT_CA7		0x00000040
33*21871138SVladimir Barinov #define MODE_MSK_BOOT_SH4		0x000000C0
34*21871138SVladimir Barinov #define MODE_VAL_BOOT_SH4		0x000000C0
35*21871138SVladimir Barinov 
36*21871138SVladimir Barinov /* JTAG connection */
37*21871138SVladimir Barinov #define MODE_MSK_JTAG_CORESIGHT		0xC0301C00
38*21871138SVladimir Barinov #define MODE_VAL_JTAG_CORESIGHT		0x00200000
39*21871138SVladimir Barinov #define MODE_MSK_JTAG_SH4		0xC0301C00
40*21871138SVladimir Barinov #define MODE_VAL_JTAG_SH4		0x00300000
41*21871138SVladimir Barinov 
42*21871138SVladimir Barinov /* DDR3 (PLL) speed */
43*21871138SVladimir Barinov #define MODE_MSK_DDR3_1600		0x00080000
44*21871138SVladimir Barinov #define MODE_VAL_DDR3_1600		0x00000000
45*21871138SVladimir Barinov #define MODE_MSK_DDR3_1333		0x00080000
46*21871138SVladimir Barinov #define MODE_VAL_DDR3_1333		0x00080000
47*21871138SVladimir Barinov 
48*21871138SVladimir Barinov /* ComboPhy0 mode */
49*21871138SVladimir Barinov #define MODE_MSK_PHY0_SATA0		0x01000000
50*21871138SVladimir Barinov #define MODE_VAL_PHY0_SATA0		0x00000000
51*21871138SVladimir Barinov #define MODE_MSK_PHY0_PCIE		0x01000000
52*21871138SVladimir Barinov #define MODE_VAL_PHY0_PCIE		0x01000000
53*21871138SVladimir Barinov 
54*21871138SVladimir Barinov /* ComboPhy1 mode */
55*21871138SVladimir Barinov #define MODE_MSK_PHY1_SATA1		0x00800000
56*21871138SVladimir Barinov #define MODE_VAL_PHY1_SATA1		0x00000000
57*21871138SVladimir Barinov #define MODE_MSK_PHY1_USB3		0x00800000
58*21871138SVladimir Barinov #define MODE_VAL_PHY1_USB3		0x00800000
59*21871138SVladimir Barinov 
60*21871138SVladimir Barinov /*
61*21871138SVladimir Barinov  * Illegal multiplexer combinations.
62*21871138SVladimir Barinov  *    MUX                      Conflicts
63*21871138SVladimir Barinov  *    name                  with any one of
64*21871138SVladimir Barinov  * VIN0_BT656            VIN0_full, SD2
65*21871138SVladimir Barinov  * VIN0_full             VIN0_BT656, SD2, AVB, VIN2_(all)
66*21871138SVladimir Barinov  * VIN1_BT656            VIN1_(others), SD0
67*21871138SVladimir Barinov  * VIN1_10bit            VIN1_(others), SD0, VIN3_with*, I2C1
68*21871138SVladimir Barinov  * VIN1_12bit            VIN1_(others), SD0, VIN3_with*, I2C1, SCIFA0_(all)
69*21871138SVladimir Barinov  * VIN2_BT656            VIN0_full, VIN2_(others), AVB,
70*21871138SVladimir Barinov  * VIN2_withSYNC         VIN0_full, VIN2_(others), AVB, I2C1, SCIFA0_(all),
71*21871138SVladimir Barinov  *                       VIN3_with*
72*21871138SVladimir Barinov  * VIN2_withFIELD        VIN0_full, VIN2_(others), AVB, SQPI_(all)
73*21871138SVladimir Barinov  * VIN2_withSYNCandFIELD VIN0_full, VIN2_(others), AVB, SQPI_(all), I2C1,
74*21871138SVladimir Barinov  *                       SCIFA0_(all), VIN3_with*
75*21871138SVladimir Barinov  * VIN3_BT656            VIN3_(others), IRQ3
76*21871138SVladimir Barinov  * VIN3_withFIELD        VIN3_(others), IRQ3, VIN1_12bit, VIN2_withSYNC,
77*21871138SVladimir Barinov  *                       VIN2_withSYNCandFIELD, VIN1_10bit
78*21871138SVladimir Barinov  * VIN3_withSYNCandFIELD VIN3_(others), IRQ3, VIN1_12bit, VIN2_withSYNC,
79*21871138SVladimir Barinov  *                       VIN2_withSYNCandFIELD, VIN1_10bit, I2C1
80*21871138SVladimir Barinov  * AVB                   VIN0_full, VIN2_(all)
81*21871138SVladimir Barinov  * QSPI_ONBOARD          VIN2_withFIELD, VIN2_withSYNCandFIELD, QSPI_COMEXPRESS
82*21871138SVladimir Barinov  * QSPI_COMEXPRESS       VIN2_withFIELD, VIN2_withSYNCandFIELD, QSPI_ONBOARD
83*21871138SVladimir Barinov  * I2C1                  VIN1_12bit, VIN2_withSYNC, VIN2_withSYNCandFIELD,
84*21871138SVladimir Barinov  *                       VIN3_withSYNCandFIELD
85*21871138SVladimir Barinov  * IRQ3                  VIN3_(all)
86*21871138SVladimir Barinov  * SCIFA0_USB            VIN1_12bit, VIN2_withSYNC, VIN2_withSYNCandFIELD,
87*21871138SVladimir Barinov  *                       SCIFA0_COMEXPRESS
88*21871138SVladimir Barinov  * SCIFA0_COMEXPRESS     VIN1_12bit, VIN2_withSYNC, VIN2_withSYNCandFIELD,
89*21871138SVladimir Barinov  *                       SCIFA0_USB
90*21871138SVladimir Barinov  * SCIFA2                PWM210
91*21871138SVladimir Barinov  * ETH_ONBOARD           ETH_COMEXPRESS
92*21871138SVladimir Barinov  * ETH_COMEXPRESS        ETH_ONBOARD
93*21871138SVladimir Barinov  * SD0                   VIN1_(all)
94*21871138SVladimir Barinov  * SD2                   VIN0_(all)
95*21871138SVladimir Barinov  * PWM210                SCIFA2
96*21871138SVladimir Barinov  */
97*21871138SVladimir Barinov 
98*21871138SVladimir Barinov /* connected to COM Express connector and CN6 for camera, BT656 only */
99*21871138SVladimir Barinov #define MUX_MSK_VIN0_BT656		0x00001001
100*21871138SVladimir Barinov #define MUX_VAL_VIN0_BT656		0x00000000
101*21871138SVladimir Barinov /* connected to COM Express connector and CN6 for camera, all modes */
102*21871138SVladimir Barinov #define MUX_MSK_VIN0_full		0x00001007
103*21871138SVladimir Barinov #define MUX_VAL_VIN0_full		0x00000002
104*21871138SVladimir Barinov /* connected to COM Express connector, BT656 only */
105*21871138SVladimir Barinov #define MUX_MSK_VIN1_BT656		0x00000801
106*21871138SVladimir Barinov #define MUX_VAL_VIN1_BT656		0x00000800
107*21871138SVladimir Barinov /* connected to COM Express connector, all 10-bit modes */
108*21871138SVladimir Barinov #define MUX_MSK_VIN1_10bit		0x00000821
109*21871138SVladimir Barinov #define MUX_VAL_VIN1_10bit		0x00000800
110*21871138SVladimir Barinov /* connected to COM Express connector, all 12-bit modes */
111*21871138SVladimir Barinov #define MUX_MSK_VIN1_12bit		0x000008A1
112*21871138SVladimir Barinov #define MUX_VAL_VIN1_12bit		0x00000880
113*21871138SVladimir Barinov /* connected to COM Express connector, BT656 only */
114*21871138SVladimir Barinov #define MUX_MSK_VIN2_BT656		0x00000007
115*21871138SVladimir Barinov #define MUX_VAL_VIN2_BT656		0x00000006
116*21871138SVladimir Barinov /* connected to COM Express connector, modes with sync signals */
117*21871138SVladimir Barinov #define MUX_MSK_VIN2_withSYNC		0x000000A7
118*21871138SVladimir Barinov #define MUX_VAL_VIN2_withSYNC		0x00000086
119*21871138SVladimir Barinov /* connected to COM Express connector, modes with field, clken signals */
120*21871138SVladimir Barinov #define MUX_MSK_VIN2_withFIELD		0x0000000F
121*21871138SVladimir Barinov #define MUX_VAL_VIN2_withFIELD		0x0000000E
122*21871138SVladimir Barinov /* connected to COM Express connector, modes with sync, field, clken signals */
123*21871138SVladimir Barinov #define MUX_MSK_VIN2_withSYNCandFIELD	0x000000AF
124*21871138SVladimir Barinov #define MUX_VAL_VIN2_withSYNCandFIELD	0x0000008E
125*21871138SVladimir Barinov /* connected to COM Express connector, BT656 only */
126*21871138SVladimir Barinov #define MUX_MSK_VIN3_BT656		0x00000101
127*21871138SVladimir Barinov #define MUX_VAL_VIN3_BT656		0x00000100
128*21871138SVladimir Barinov /* connected to COM Express connector, modes with field, clken signals */
129*21871138SVladimir Barinov #define MUX_MSK_VIN3_withFIELD		0x00000121
130*21871138SVladimir Barinov #define MUX_VAL_VIN3_withFIELD		0x00000120
131*21871138SVladimir Barinov /* connected to COM Express connector, modes with sync, field, clken signals */
132*21871138SVladimir Barinov #define MUX_MSK_VIN3_withSYNCandFIELD	0x00000161
133*21871138SVladimir Barinov #define MUX_VAL_VIN3_withSYNCandFIELD	0x00000120
134*21871138SVladimir Barinov /* connected to COM Express connector (RGMII) */
135*21871138SVladimir Barinov #define MUX_MSK_AVB			0x00000003
136*21871138SVladimir Barinov #define MUX_VAL_AVB			0x00000000
137*21871138SVladimir Barinov /* connected to on-board QSPI flash */
138*21871138SVladimir Barinov #define MUX_MSK_QSPI_ONBOARD		0x00000019
139*21871138SVladimir Barinov #define MUX_VAL_QSPI_ONBOARD		0x00000000
140*21871138SVladimir Barinov /* connected to COM Express connector */
141*21871138SVladimir Barinov #define MUX_MSK_QSPI_COMEXPRESS		0x00000019
142*21871138SVladimir Barinov #define MUX_VAL_QSPI_COMEXPRESS		0x00000010
143*21871138SVladimir Barinov /* connected to COM Express connector and PMIC */
144*21871138SVladimir Barinov #define MUX_MSK_I2C1			0x00000061
145*21871138SVladimir Barinov #define MUX_VAL_I2C1			0x00000060
146*21871138SVladimir Barinov /* connected to HDMI driver */
147*21871138SVladimir Barinov #define MUX_MSK_IRQ3			0x00000101
148*21871138SVladimir Barinov #define MUX_VAL_IRQ3			0x00000000
149*21871138SVladimir Barinov /* connected to USB/FTDI */
150*21871138SVladimir Barinov #define MUX_MSK_SCIFA0_USB		0x00004081
151*21871138SVladimir Barinov #define MUX_VAL_SCIFA0_USB		0x00004000
152*21871138SVladimir Barinov /* connected to COM Express connector */
153*21871138SVladimir Barinov #define MUX_MSK_SCIFA0_COMEXPRESS	0x00004081
154*21871138SVladimir Barinov #define MUX_VAL_SCIFA0_COMEXPRESS	0x00000000
155*21871138SVladimir Barinov /* connected to COM Express connector */
156*21871138SVladimir Barinov #define MUX_MSK_SCIFA2			0x00002001
157*21871138SVladimir Barinov #define MUX_VAL_SCIFA2			0x00000000
158*21871138SVladimir Barinov /* connected to on-board 10/100 Phy */
159*21871138SVladimir Barinov #define MUX_MSK_ETH_ONBOARD		0x00000600
160*21871138SVladimir Barinov #define MUX_VAL_ETH_ONBOARD		0x00000000
161*21871138SVladimir Barinov /* connected to COM Express connector (RMII) */
162*21871138SVladimir Barinov #define MUX_MSK_ETH_COMEXPRESS		0x00000600
163*21871138SVladimir Barinov #define MUX_VAL_ETH_COMEXPRESS		0x00000400
164*21871138SVladimir Barinov /* connected to on-board MicroSD slot */
165*21871138SVladimir Barinov #define MUX_MSK_SD0			0x00000801
166*21871138SVladimir Barinov #define MUX_VAL_SD0			0x00000000
167*21871138SVladimir Barinov /* connected to COM Express connector */
168*21871138SVladimir Barinov #define MUX_MSK_SD2			0x00001001
169*21871138SVladimir Barinov #define MUX_VAL_SD2			0x00001000
170*21871138SVladimir Barinov /* connected to COM Express connector */
171*21871138SVladimir Barinov #define MUX_MSK_PWM210			0x00002001
172*21871138SVladimir Barinov #define MUX_VAL_PWM210			0x00002000
173*21871138SVladimir Barinov 
174*21871138SVladimir Barinov #define HDMI_MSK			0x07
175*21871138SVladimir Barinov #define HDMI_OFF			0x00
176*21871138SVladimir Barinov #define HDMI_ONBOARD			0x07
177*21871138SVladimir Barinov #define HDMI_COMEXPRESS			0x05
178*21871138SVladimir Barinov #define HDMI_ONBOARD_NODDC		0x03
179*21871138SVladimir Barinov #define HDMI_COMEXPRESS_NODDC		0x01
180*21871138SVladimir Barinov 
181*21871138SVladimir Barinov void cpld_init(void);
182*21871138SVladimir Barinov 
183*21871138SVladimir Barinov #endif	/* _CPLD_H_ */
184