1 /*
2  * Copyright (C) 2008 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <common.h>
8 #include <asm/io.h>
9 #include <asm/processor.h>
10 #include <asm/pci.h>
11 #include <netdev.h>
12 
13 DECLARE_GLOBAL_DATA_PTR;
14 
15 int checkboard(void)
16 {
17 	puts("BOARD: Renesas Technology Corp. R0P7785LC0011RL\n");
18 	return 0;
19 }
20 
21 int board_init(void)
22 {
23 	return 0;
24 }
25 
26 int dram_init(void)
27 {
28 	gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
29 	gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
30 	printf("DRAM:  %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
31 	return 0;
32 }
33 
34 static struct pci_controller hose;
35 void pci_init_board(void)
36 {
37 	pci_sh7780_init(&hose);
38 }
39 
40 int board_eth_init(bd_t *bis)
41 {
42 	return pci_eth_init(bis);
43 }
44 
45 #if defined(CONFIG_SH_32BIT)
46 int do_pmb(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
47 {
48 	/* clear ITLB */
49 	writel(0x00000004, 0xff000010);
50 
51 	/* delete PMB for peripheral */
52 	writel(0, PMB_ADDR_BASE(0));
53 	writel(0, PMB_DATA_BASE(0));
54 	writel(0, PMB_ADDR_BASE(1));
55 	writel(0, PMB_DATA_BASE(1));
56 	writel(0, PMB_ADDR_BASE(2));
57 	writel(0, PMB_DATA_BASE(2));
58 
59 	/* add PMB for SDRAM(0x40000000 - 0x47ffffff) */
60 	writel(mk_pmb_addr_val(0x80), PMB_ADDR_BASE(8));
61 	writel(mk_pmb_data_val(0x40, 0, 1, 1, 0, 1, 1), PMB_DATA_BASE(8));
62 	writel(mk_pmb_addr_val(0xa0), PMB_ADDR_BASE(12));
63 	writel(mk_pmb_data_val(0x40, 1, 1, 1, 0, 0, 1), PMB_DATA_BASE(12));
64 
65 	return 0;
66 }
67 
68 U_BOOT_CMD(
69 	pmb,	1,	1,	do_pmb,
70 	"pmb     - PMB setting\n",
71 	"\n"
72 	"    - PMB setting for all SDRAM mapping"
73 );
74 #endif
75