1 /*
2  * Copyright (C) 2008 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License as
6  * published by the Free Software Foundation; either version 2 of
7  * the License, or (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software
16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
17  * MA 02111-1307 USA
18  */
19 
20 #include <common.h>
21 #include <asm/io.h>
22 #include <asm/processor.h>
23 #include <asm/pci.h>
24 #include <netdev.h>
25 
26 int checkboard(void)
27 {
28 	puts("BOARD: Renesas Technology Corp. R0P7785LC0011RL\n");
29 	return 0;
30 }
31 
32 int board_init(void)
33 {
34 	return 0;
35 }
36 
37 int dram_init(void)
38 {
39 	DECLARE_GLOBAL_DATA_PTR;
40 
41 	gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
42 	gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
43 	printf("DRAM:  %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
44 	return 0;
45 }
46 
47 static struct pci_controller hose;
48 void pci_init_board(void)
49 {
50 	pci_sh7780_init(&hose);
51 }
52 
53 int board_eth_init(bd_t *bis)
54 {
55 	return pci_eth_init(bis);
56 }
57 
58 #if defined(CONFIG_SH_32BIT)
59 int do_pmb(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
60 {
61 	/* clear ITLB */
62 	writel(0x00000004, 0xff000010);
63 
64 	/* delete PMB for peripheral */
65 	writel(0, PMB_ADDR_BASE(0));
66 	writel(0, PMB_DATA_BASE(0));
67 	writel(0, PMB_ADDR_BASE(1));
68 	writel(0, PMB_DATA_BASE(1));
69 	writel(0, PMB_ADDR_BASE(2));
70 	writel(0, PMB_DATA_BASE(2));
71 
72 	/* add PMB for SDRAM(0x40000000 - 0x47ffffff) */
73 	writel(mk_pmb_addr_val(0x80), PMB_ADDR_BASE(8));
74 	writel(mk_pmb_data_val(0x40, 0, 1, 1, 0, 1, 1), PMB_DATA_BASE(8));
75 	writel(mk_pmb_addr_val(0xa0), PMB_ADDR_BASE(12));
76 	writel(mk_pmb_data_val(0x40, 1, 1, 1, 0, 0, 1), PMB_DATA_BASE(12));
77 
78 	return 0;
79 }
80 
81 U_BOOT_CMD(
82 	pmb,	1,	1,	do_pmb,
83 	"pmb     - PMB setting\n",
84 	"\n"
85 	"    - PMB setting for all SDRAM mapping"
86 );
87 #endif
88