1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2008 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
4 */
5
6 #include <common.h>
7 #include <asm/io.h>
8 #include <asm/processor.h>
9 #include <asm/pci.h>
10 #include <netdev.h>
11
checkboard(void)12 int checkboard(void)
13 {
14 puts("BOARD: Renesas Technology Corp. R0P7785LC0011RL\n");
15 return 0;
16 }
17
board_init(void)18 int board_init(void)
19 {
20 return 0;
21 }
22
23 static struct pci_controller hose;
pci_init_board(void)24 void pci_init_board(void)
25 {
26 pci_sh7780_init(&hose);
27 }
28
board_eth_init(bd_t * bis)29 int board_eth_init(bd_t *bis)
30 {
31 return pci_eth_init(bis);
32 }
33
34 #if defined(CONFIG_SH_32BIT)
do_pmb(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])35 int do_pmb(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
36 {
37 /* clear ITLB */
38 writel(0x00000004, 0xff000010);
39
40 /* delete PMB for peripheral */
41 writel(0, PMB_ADDR_BASE(0));
42 writel(0, PMB_DATA_BASE(0));
43 writel(0, PMB_ADDR_BASE(1));
44 writel(0, PMB_DATA_BASE(1));
45 writel(0, PMB_ADDR_BASE(2));
46 writel(0, PMB_DATA_BASE(2));
47
48 /* add PMB for SDRAM(0x40000000 - 0x47ffffff) */
49 writel(mk_pmb_addr_val(0x80), PMB_ADDR_BASE(8));
50 writel(mk_pmb_data_val(0x40, 0, 1, 1, 0, 1, 1), PMB_DATA_BASE(8));
51 writel(mk_pmb_addr_val(0xa0), PMB_ADDR_BASE(12));
52 writel(mk_pmb_data_val(0x40, 1, 1, 1, 0, 0, 1), PMB_DATA_BASE(12));
53
54 return 0;
55 }
56
57 U_BOOT_CMD(
58 pmb, 1, 1, do_pmb,
59 "pmb - PMB setting\n",
60 "\n"
61 " - PMB setting for all SDRAM mapping"
62 );
63 #endif
64