1c6525d45SNobuhiro Iwamatsu /* 2c6525d45SNobuhiro Iwamatsu * Copyright (C) 2008 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> 3c6525d45SNobuhiro Iwamatsu * 4c6525d45SNobuhiro Iwamatsu * This program is free software; you can redistribute it and/or 5c6525d45SNobuhiro Iwamatsu * modify it under the terms of the GNU General Public License as 6c6525d45SNobuhiro Iwamatsu * published by the Free Software Foundation; either version 2 of 7c6525d45SNobuhiro Iwamatsu * the License, or (at your option) any later version. 8c6525d45SNobuhiro Iwamatsu * 9c6525d45SNobuhiro Iwamatsu * This program is distributed in the hope that it will be useful, 10c6525d45SNobuhiro Iwamatsu * but WITHOUT ANY WARRANTY; without even the implied warranty of 11c6525d45SNobuhiro Iwamatsu * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12c6525d45SNobuhiro Iwamatsu * GNU General Public License for more details. 13c6525d45SNobuhiro Iwamatsu * 14c6525d45SNobuhiro Iwamatsu * You should have received a copy of the GNU General Public License 15c6525d45SNobuhiro Iwamatsu * along with this program; if not, write to the Free Software 16c6525d45SNobuhiro Iwamatsu * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 17c6525d45SNobuhiro Iwamatsu * MA 02111-1307 USA 18c6525d45SNobuhiro Iwamatsu */ 19c6525d45SNobuhiro Iwamatsu 20c6525d45SNobuhiro Iwamatsu #include <common.h> 21c6525d45SNobuhiro Iwamatsu #include <asm/io.h> 22c6525d45SNobuhiro Iwamatsu #include <asm/processor.h> 23c6525d45SNobuhiro Iwamatsu #include <asm/pci.h> 24c6525d45SNobuhiro Iwamatsu #include <netdev.h> 25c6525d45SNobuhiro Iwamatsu 26c6525d45SNobuhiro Iwamatsu int checkboard(void) 27c6525d45SNobuhiro Iwamatsu { 28c6525d45SNobuhiro Iwamatsu puts("BOARD: Renesas Technology Corp. R0P7785LC0011RL\n"); 29c6525d45SNobuhiro Iwamatsu return 0; 30c6525d45SNobuhiro Iwamatsu } 31c6525d45SNobuhiro Iwamatsu 32c6525d45SNobuhiro Iwamatsu int board_init(void) 33c6525d45SNobuhiro Iwamatsu { 34c6525d45SNobuhiro Iwamatsu return 0; 35c6525d45SNobuhiro Iwamatsu } 36c6525d45SNobuhiro Iwamatsu 37c6525d45SNobuhiro Iwamatsu int dram_init(void) 38c6525d45SNobuhiro Iwamatsu { 39c6525d45SNobuhiro Iwamatsu DECLARE_GLOBAL_DATA_PTR; 40c6525d45SNobuhiro Iwamatsu 41c6525d45SNobuhiro Iwamatsu gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; 42c6525d45SNobuhiro Iwamatsu gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE; 43c6525d45SNobuhiro Iwamatsu printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024)); 44c6525d45SNobuhiro Iwamatsu return 0; 45c6525d45SNobuhiro Iwamatsu } 46c6525d45SNobuhiro Iwamatsu 47c6525d45SNobuhiro Iwamatsu static struct pci_controller hose; 48c6525d45SNobuhiro Iwamatsu void pci_init_board(void) 49c6525d45SNobuhiro Iwamatsu { 50c6525d45SNobuhiro Iwamatsu pci_sh7780_init(&hose); 51c6525d45SNobuhiro Iwamatsu } 52c6525d45SNobuhiro Iwamatsu 53c6525d45SNobuhiro Iwamatsu int board_eth_init(bd_t *bis) 54c6525d45SNobuhiro Iwamatsu { 55c6525d45SNobuhiro Iwamatsu return pci_eth_init(bis); 56c6525d45SNobuhiro Iwamatsu } 57*ada93182SYoshihiro Shimoda 58*ada93182SYoshihiro Shimoda #if defined(CONFIG_SH_32BIT) 59*ada93182SYoshihiro Shimoda int do_pmb(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) 60*ada93182SYoshihiro Shimoda { 61*ada93182SYoshihiro Shimoda /* clear ITLB */ 62*ada93182SYoshihiro Shimoda writel(0x00000004, 0xff000010); 63*ada93182SYoshihiro Shimoda 64*ada93182SYoshihiro Shimoda /* delete PMB for peripheral */ 65*ada93182SYoshihiro Shimoda writel(0, PMB_ADDR_BASE(0)); 66*ada93182SYoshihiro Shimoda writel(0, PMB_DATA_BASE(0)); 67*ada93182SYoshihiro Shimoda writel(0, PMB_ADDR_BASE(1)); 68*ada93182SYoshihiro Shimoda writel(0, PMB_DATA_BASE(1)); 69*ada93182SYoshihiro Shimoda writel(0, PMB_ADDR_BASE(2)); 70*ada93182SYoshihiro Shimoda writel(0, PMB_DATA_BASE(2)); 71*ada93182SYoshihiro Shimoda 72*ada93182SYoshihiro Shimoda /* add PMB for SDRAM(0x40000000 - 0x47ffffff) */ 73*ada93182SYoshihiro Shimoda writel(mk_pmb_addr_val(0x80), PMB_ADDR_BASE(8)); 74*ada93182SYoshihiro Shimoda writel(mk_pmb_data_val(0x40, 0, 1, 1, 0, 1, 1), PMB_DATA_BASE(8)); 75*ada93182SYoshihiro Shimoda writel(mk_pmb_addr_val(0xa0), PMB_ADDR_BASE(12)); 76*ada93182SYoshihiro Shimoda writel(mk_pmb_data_val(0x40, 1, 1, 1, 0, 0, 1), PMB_DATA_BASE(12)); 77*ada93182SYoshihiro Shimoda 78*ada93182SYoshihiro Shimoda return 0; 79*ada93182SYoshihiro Shimoda } 80*ada93182SYoshihiro Shimoda 81*ada93182SYoshihiro Shimoda U_BOOT_CMD( 82*ada93182SYoshihiro Shimoda pmb, 1, 1, do_pmb, 83*ada93182SYoshihiro Shimoda "pmb - PMB setting\n", 84*ada93182SYoshihiro Shimoda "\n" 85*ada93182SYoshihiro Shimoda " - PMB setting for all SDRAM mapping\n" 86*ada93182SYoshihiro Shimoda ); 87*ada93182SYoshihiro Shimoda #endif 88*ada93182SYoshihiro Shimoda 89