1/*
2 * Copyright (C) 2007,2008 Nobuhiro Iwamatsu
3 *
4 * u-boot/board/r7780mp/lowlevel_init.S
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19 * MA 02111-1307 USA
20 */
21
22#include <config.h>
23#include <version.h>
24#include <asm/processor.h>
25
26/*
27 *  Board specific low level init code, called _very_ early in the
28 *  startup sequence. Relocation to SDRAM has not happened yet, no
29 *  stack is available, bss section has not been initialised, etc.
30 *
31 *  (Note: As no stack is available, no subroutines can be called...).
32 */
33
34	.global	lowlevel_init
35
36	.text
37	.align	2
38
39lowlevel_init:
40
41	mov.l	CCR_A, r1	/* Address of Cache Control Register */
42	mov.l	CCR_D, r0	/* Instruction Cache Invalidate */
43	mov.l	r0, @r1
44
45	mov.l	FRQCR_A, r1	/* Frequency control register */
46	mov.l	FRQCR_D, r0
47	mov.l	r0, @r1
48
49	/* pin_multi_setting */
50	mov.l   BBG_PMMR_A,r1
51	mov.l   BBG_PMMR_D_PMSR1,r0
52	mov.l   r0,@r1
53
54	mov.l   BBG_PMSR1_A,r1
55	mov.l   BBG_PMSR1_D,r0
56	mov.l   r0,@r1
57
58	mov.l   BBG_PMMR_A,r1
59	mov.l   BBG_PMMR_D_PMSR2,r0
60	mov.l   r0,@r1
61
62	mov.l   BBG_PMSR2_A,r1
63	mov.l   BBG_PMSR2_D,r0
64	mov.l   r0,@r1
65
66	mov.l   BBG_PMMR_A,r1
67	mov.l   BBG_PMMR_D_PMSR3,r0
68	mov.l   r0,@r1
69
70	mov.l   BBG_PMSR3_A,r1
71	mov.l   BBG_PMSR3_D,r0
72	mov.l   r0,@r1
73
74	mov.l   BBG_PMMR_A,r1
75	mov.l   BBG_PMMR_D_PMSR4,r0
76	mov.l   r0,@r1
77
78	mov.l   BBG_PMSR4_A,r1
79	mov.l   BBG_PMSR4_D,r0
80	mov.l   r0,@r1
81
82	mov.l   BBG_PMMR_A,r1
83	mov.l   BBG_PMMR_D_PMSRG,r0
84	mov.l   r0,@r1
85
86	mov.l   BBG_PMSRG_A,r1
87	mov.l   BBG_PMSRG_D,r0
88	mov.l   r0,@r1
89
90	/* cpg_setting */
91	mov.l   FRQCR_A,r1
92	mov.l   FRQCR_D,r0
93	mov.l   r0,@r1
94
95	mov.l   DLLCSR_A,r1
96	mov.l   DLLCSR_D,r0
97	mov.l   r0,@r1
98
99	nop
100	nop
101	nop
102	nop
103	nop
104	nop
105	nop
106	nop
107	nop
108	nop
109
110	/* wait 200us */
111	mov.l   REPEAT0_R3,r3
112	mov     #0,r2
113repeat0:
114	add     #1,r2
115	cmp/hs  r3,r2
116	bf      repeat0
117	nop
118
119	/* bsc_setting */
120	mov.l	MMSELR_A,r1
121	mov.l	MMSELR_D,r0
122	mov.l	r0,@r1
123
124	mov.l	BCR_A,r1
125	mov.l	BCR_D,r0
126	mov.l	r0,@r1
127
128	mov.l	CS0BCR_A,r1
129	mov.l	CS0BCR_D,r0
130	mov.l	r0,@r1
131
132	mov.l	CS1BCR_A,r1
133	mov.l	CS1BCR_D,r0
134	mov.l	r0,@r1
135
136	mov.l	CS2BCR_A,r1
137	mov.l	CS2BCR_D,r0
138	mov.l	r0,@r1
139
140	mov.l	CS4BCR_A,r1
141	mov.l	CS4BCR_D,r0
142	mov.l	r0,@r1
143
144	mov.l	CS5BCR_A,r1
145	mov.l	CS5BCR_D,r0
146	mov.l	r0,@r1
147
148	mov.l	CS6BCR_A,r1
149	mov.l	CS6BCR_D,r0
150	mov.l	r0,@r1
151
152	mov.l	CS0WCR_A,r1
153	mov.l	CS0WCR_D,r0
154	mov.l	r0,@r1
155
156	mov.l	CS1WCR_A,r1
157	mov.l	CS1WCR_D,r0
158	mov.l	r0,@r1
159
160	mov.l	CS2WCR_A,r1
161	mov.l	CS2WCR_D,r0
162	mov.l	r0,@r1
163
164	mov.l	CS4WCR_A,r1
165	mov.l	CS4WCR_D,r0
166	mov.l	r0,@r1
167
168	mov.l	CS5WCR_A,r1
169	mov.l	CS5WCR_D,r0
170	mov.l	r0,@r1
171
172	mov.l	CS6WCR_A,r1
173	mov.l	CS6WCR_D,r0
174	mov.l	r0,@r1
175
176	mov.l	CS5PCR_A,r1
177	mov.l	CS5PCR_D,r0
178	mov.l	r0,@r1
179
180	mov.l	CS6PCR_A,r1
181	mov.l	CS6PCR_D,r0
182	mov.l	r0,@r1
183
184	/* ddr_setting */
185	/* wait 200us */
186	mov.l   REPEAT0_R3,r3
187	mov     #0,r2
188repeat1:
189	add     #1,r2
190	cmp/hs  r3,r2
191	bf      repeat1
192	nop
193
194	mov.l   MIM_U_A,r0
195	mov.l   MIM_U_D,r1
196	synco
197	mov.l   r1,@r0
198	synco
199
200	mov.l	MIM_L_A,r0
201	mov.l	MIM_L_D0,r1
202	synco
203	mov.l	r1,@r0
204	synco
205
206	mov.l   STR_L_A,r0
207	mov.l   STR_L_D,r1
208	synco
209	mov.l   r1,@r0
210	synco
211
212	mov.l   SDR_L_A,r0
213	mov.l   SDR_L_D,r1
214	synco
215	mov.l   r1,@r0
216	synco
217
218	nop
219	nop
220	nop
221	nop
222
223	mov.l   SCR_L_A,r0
224	mov.l   SCR_L_D0,r1
225	synco
226	mov.l   r1,@r0
227	synco
228
229	mov.l   SCR_L_A,r0
230	mov.l   SCR_L_D1,r1
231	synco
232	mov.l   r1,@r0
233	synco
234
235	nop
236	nop
237	nop
238
239	mov.l   EMRS_A,r0
240	mov.l   EMRS_D,r1
241	synco
242	mov.l   r1,@r0
243	synco
244
245	nop
246	nop
247	nop
248
249	mov.l   MRS1_A,r0
250	mov.l   MRS1_D,r1
251	synco
252	mov.l   r1,@r0
253	synco
254
255	nop
256	nop
257	nop
258
259	mov.l   SCR_L_A,r0
260	mov.l   SCR_L_D2,r1
261	synco
262	mov.l   r1,@r0
263	synco
264
265	nop
266	nop
267	nop
268
269	mov.l   SCR_L_A,r0
270	mov.l   SCR_L_D3,r1
271	synco
272	mov.l   r1,@r0
273	synco
274
275	nop
276	nop
277	nop
278
279	mov.l   SCR_L_A,r0
280	mov.l   SCR_L_D4,r1
281	synco
282	mov.l   r1,@r0
283	synco
284
285	nop
286	nop
287	nop
288
289	mov.l   MRS2_A,r0
290	mov.l   MRS2_D,r1
291	synco
292	mov.l   r1,@r0
293	synco
294
295	nop
296	nop
297	nop
298
299	mov.l   SCR_L_A,r0
300	mov.l   SCR_L_D5,r1
301	synco
302	mov.l   r1,@r0
303	synco
304
305	/* wait 200us */
306	mov.l   REPEAT0_R1,r3
307	mov     #0,r2
308repeat2:
309	add     #1,r2
310	cmp/hs  r3,r2
311	bf      repeat2
312
313	synco
314
315	mov.l   MIM_L_A,r0
316	mov.l   MIM_L_D1,r1
317	synco
318	mov.l   r1,@r0
319	synco
320
321	rts
322	nop
323	.align	4
324
325RWTCSR_D_1:				.word	0xA507
326RWTCSR_D_2:				.word	0xA507
327RWTCNT_D:				.word	0x5A00
328	.align	2
329
330BBG_PMMR_A:				.long	0xFF800010
331BBG_PMSR1_A:			.long	0xFF800014
332BBG_PMSR2_A:			.long	0xFF800018
333BBG_PMSR3_A:			.long	0xFF80001C
334BBG_PMSR4_A:			.long	0xFF800020
335BBG_PMSRG_A:			.long	0xFF800024
336
337BBG_PMMR_D_PMSR1:       .long	0xffffbffd
338BBG_PMSR1_D:            .long	0x00004002
339BBG_PMMR_D_PMSR2:       .long	0xfc21a7ff
340BBG_PMSR2_D:            .long	0x03de5800
341BBG_PMMR_D_PMSR3:       .long	0xfffffff8
342BBG_PMSR3_D:            .long	0x00000007
343BBG_PMMR_D_PMSR4:       .long	0xdffdfff9
344BBG_PMSR4_D:            .long	0x20020006
345BBG_PMMR_D_PMSRG:       .long	0xffffffff
346BBG_PMSRG_D:            .long	0x00000000
347
348FRQCR_A:				.long	FRQCR
349DLLCSR_A:				.long	0xffc40010
350FRQCR_D:				.long	0x40233035
351DLLCSR_D:				.long	0x00000000
352
353/* for DDR-SDRAM */
354MIM_U_A:				.long	MIM_1
355MIM_L_A:				.long	MIM_2
356SCR_U_A:				.long	SCR_1
357SCR_L_A:				.long	SCR_2
358STR_U_A:				.long	STR_1
359STR_L_A:				.long	STR_2
360SDR_U_A:				.long	SDR_1
361SDR_L_A:				.long	SDR_2
362
363EMRS_A:					.long	0xFEC02000
364MRS1_A:					.long	0xFEC00B08
365MRS2_A:					.long	0xFEC00308
366
367MIM_U_D:				.long	0x00004000
368MIM_L_D0:				.long	0x03e80009
369MIM_L_D1:				.long	0x03e80209
370SCR_L_D0:				.long	0x3
371SCR_L_D1:				.long	0x2
372SCR_L_D2:				.long	0x2
373SCR_L_D3:				.long	0x4
374SCR_L_D4:				.long	0x4
375SCR_L_D5:				.long	0x0
376STR_L_D:				.long	0x000f0000
377SDR_L_D:				.long	0x00000400
378EMRS_D:					.long	0x0
379MRS1_D:					.long	0x0
380MRS2_D:					.long	0x0
381
382/* Cache Controller */
383CCR_A:		.long	CCR
384MMUCR_A:	.long	MMUCR
385RWTCNT_A:	.long	WTCNT
386
387CCR_D:		.long	0x0000090b
388CCR_D_2:	.long	0x00000103
389MMUCR_D:	.long	0x00000004
390MSTPCR0_D:	.long	0x00001001
391MSTPCR2_D:	.long	0xffffffff
392
393/* local Bus State Controller */
394MMSELR_A:   .long   MMSELR
395BCR_A:      .long   BCR
396CS0BCR_A:   .long   CS0BCR
397CS1BCR_A:   .long   CS1BCR
398CS2BCR_A:   .long   CS2BCR
399CS4BCR_A:   .long   CS4BCR
400CS5BCR_A:   .long   CS5BCR
401CS6BCR_A:   .long   CS6BCR
402CS0WCR_A:   .long   CS0WCR
403CS1WCR_A:   .long   CS1WCR
404CS2WCR_A:   .long   CS2WCR
405CS4WCR_A:   .long   CS4WCR
406CS5WCR_A:   .long   CS5WCR
407CS6WCR_A:   .long   CS6WCR
408CS5PCR_A:   .long   CS5PCR
409CS6PCR_A:   .long   CS6PCR
410
411MMSELR_D:		.long	0xA5A50003
412BCR_D:			.long	0x00000000
413CS0BCR_D:		.long	0x77777770
414CS1BCR_D:		.long	0x77777670
415CS2BCR_D:		.long	0x77777770
416CS4BCR_D:		.long	0x77777770
417CS5BCR_D:		.long	0x77777670
418CS6BCR_D:		.long	0x77777770
419CS0WCR_D:		.long	0x00020006
420CS1WCR_D:		.long	0x00232304
421CS2WCR_D:		.long	0x7777770F
422CS4WCR_D:		.long	0x7777770F
423CS5WCR_D:		.long	0x00101006
424CS6WCR_D:		.long	0x77777703
425CS5PCR_D:		.long	0x77000000
426CS6PCR_D:		.long	0x77000000
427
428REPEAT0_R3:	.long   0x00002000
429REPEAT0_R1:	.long   0x0000200
430