1 /* 2 * board/renesas/koelsch/qos.c 3 * 4 * Copyright (C) 2013,2014 Renesas Electronics Corporation 5 * 6 * SPDX-License-Identifier: GPL-2.0 7 * 8 */ 9 10 #include <common.h> 11 #include <asm/processor.h> 12 #include <asm/mach-types.h> 13 #include <asm/io.h> 14 #include <asm/arch/rmobile.h> 15 16 /* QoS version 0.240 for ES1 and version 0.411 for ES2 */ 17 #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT) 18 enum { 19 DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04, 20 DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09, 21 DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14, 22 DBSC3_15, 23 DBSC3_NR, 24 }; 25 26 static u32 dbsc3_0_r_qos_addr[DBSC3_NR] = { 27 [DBSC3_00] = DBSC3_0_QOS_R0_BASE, 28 [DBSC3_01] = DBSC3_0_QOS_R1_BASE, 29 [DBSC3_02] = DBSC3_0_QOS_R2_BASE, 30 [DBSC3_03] = DBSC3_0_QOS_R3_BASE, 31 [DBSC3_04] = DBSC3_0_QOS_R4_BASE, 32 [DBSC3_05] = DBSC3_0_QOS_R5_BASE, 33 [DBSC3_06] = DBSC3_0_QOS_R6_BASE, 34 [DBSC3_07] = DBSC3_0_QOS_R7_BASE, 35 [DBSC3_08] = DBSC3_0_QOS_R8_BASE, 36 [DBSC3_09] = DBSC3_0_QOS_R9_BASE, 37 [DBSC3_10] = DBSC3_0_QOS_R10_BASE, 38 [DBSC3_11] = DBSC3_0_QOS_R11_BASE, 39 [DBSC3_12] = DBSC3_0_QOS_R12_BASE, 40 [DBSC3_13] = DBSC3_0_QOS_R13_BASE, 41 [DBSC3_14] = DBSC3_0_QOS_R14_BASE, 42 [DBSC3_15] = DBSC3_0_QOS_R15_BASE, 43 }; 44 45 static u32 dbsc3_0_w_qos_addr[DBSC3_NR] = { 46 [DBSC3_00] = DBSC3_0_QOS_W0_BASE, 47 [DBSC3_01] = DBSC3_0_QOS_W1_BASE, 48 [DBSC3_02] = DBSC3_0_QOS_W2_BASE, 49 [DBSC3_03] = DBSC3_0_QOS_W3_BASE, 50 [DBSC3_04] = DBSC3_0_QOS_W4_BASE, 51 [DBSC3_05] = DBSC3_0_QOS_W5_BASE, 52 [DBSC3_06] = DBSC3_0_QOS_W6_BASE, 53 [DBSC3_07] = DBSC3_0_QOS_W7_BASE, 54 [DBSC3_08] = DBSC3_0_QOS_W8_BASE, 55 [DBSC3_09] = DBSC3_0_QOS_W9_BASE, 56 [DBSC3_10] = DBSC3_0_QOS_W10_BASE, 57 [DBSC3_11] = DBSC3_0_QOS_W11_BASE, 58 [DBSC3_12] = DBSC3_0_QOS_W12_BASE, 59 [DBSC3_13] = DBSC3_0_QOS_W13_BASE, 60 [DBSC3_14] = DBSC3_0_QOS_W14_BASE, 61 [DBSC3_15] = DBSC3_0_QOS_W15_BASE, 62 }; 63 64 static u32 dbsc3_1_r_qos_addr[DBSC3_NR] = { 65 [DBSC3_00] = DBSC3_1_QOS_R0_BASE, 66 [DBSC3_01] = DBSC3_1_QOS_R1_BASE, 67 [DBSC3_02] = DBSC3_1_QOS_R2_BASE, 68 [DBSC3_03] = DBSC3_1_QOS_R3_BASE, 69 [DBSC3_04] = DBSC3_1_QOS_R4_BASE, 70 [DBSC3_05] = DBSC3_1_QOS_R5_BASE, 71 [DBSC3_06] = DBSC3_1_QOS_R6_BASE, 72 [DBSC3_07] = DBSC3_1_QOS_R7_BASE, 73 [DBSC3_08] = DBSC3_1_QOS_R8_BASE, 74 [DBSC3_09] = DBSC3_1_QOS_R9_BASE, 75 [DBSC3_10] = DBSC3_1_QOS_R10_BASE, 76 [DBSC3_11] = DBSC3_1_QOS_R11_BASE, 77 [DBSC3_12] = DBSC3_1_QOS_R12_BASE, 78 [DBSC3_13] = DBSC3_1_QOS_R13_BASE, 79 [DBSC3_14] = DBSC3_1_QOS_R14_BASE, 80 [DBSC3_15] = DBSC3_1_QOS_R15_BASE, 81 }; 82 83 static u32 dbsc3_1_w_qos_addr[DBSC3_NR] = { 84 [DBSC3_00] = DBSC3_1_QOS_W0_BASE, 85 [DBSC3_01] = DBSC3_1_QOS_W1_BASE, 86 [DBSC3_02] = DBSC3_1_QOS_W2_BASE, 87 [DBSC3_03] = DBSC3_1_QOS_W3_BASE, 88 [DBSC3_04] = DBSC3_1_QOS_W4_BASE, 89 [DBSC3_05] = DBSC3_1_QOS_W5_BASE, 90 [DBSC3_06] = DBSC3_1_QOS_W6_BASE, 91 [DBSC3_07] = DBSC3_1_QOS_W7_BASE, 92 [DBSC3_08] = DBSC3_1_QOS_W8_BASE, 93 [DBSC3_09] = DBSC3_1_QOS_W9_BASE, 94 [DBSC3_10] = DBSC3_1_QOS_W10_BASE, 95 [DBSC3_11] = DBSC3_1_QOS_W11_BASE, 96 [DBSC3_12] = DBSC3_1_QOS_W12_BASE, 97 [DBSC3_13] = DBSC3_1_QOS_W13_BASE, 98 [DBSC3_14] = DBSC3_1_QOS_W14_BASE, 99 [DBSC3_15] = DBSC3_1_QOS_W15_BASE, 100 }; 101 102 #if defined(CONFIG_QOS_PRI_MEDIA) 103 #define is_qos_pri_media() 1 104 #else 105 #define is_qos_pri_media() 0 106 #endif 107 108 #if defined(CONFIG_QOS_PRI_NORMAL) 109 #define is_qos_pri_normal() 1 110 #else 111 #define is_qos_pri_normal() 0 112 #endif 113 114 #if defined(CONFIG_QOS_PRI_GFX) 115 #define is_qos_pri_gfx() 1 116 #else 117 #define is_qos_pri_gfx() 0 118 #endif 119 120 void qos_init(void) 121 { 122 int i; 123 struct rcar_s3c *s3c; 124 struct rcar_s3c_qos *s3c_qos; 125 struct rcar_dbsc3_qos *qos_addr; 126 struct rcar_mxi *mxi; 127 struct rcar_mxi_qos *mxi_qos; 128 struct rcar_axi_qos *axi_qos; 129 130 /* DBSC DBADJ2 */ 131 writel(0x20042004, DBSC3_0_DBADJ2); 132 writel(0x20042004, DBSC3_1_DBADJ2); 133 134 /* S3C -QoS */ 135 s3c = (struct rcar_s3c *)S3C_BASE; 136 if (IS_R8A7791_ES2()) { 137 /* Linear All mode */ 138 /* writel(0x00000000, &s3c->s3cadsplcr); */ 139 /* Linear Linear 0x7000 to 0x7800 mode */ 140 writel(0x00BF1B0C, &s3c->s3cadsplcr); 141 /* Split Linear 0x6800 t 0x7000 mode */ 142 /* writel(0x00DF1B0C, &s3c->s3cadsplcr); */ 143 /* Ssplit All mode */ 144 /* writel(0x00FF1B0C, &s3c->s3cadsplcr); */ 145 146 if (is_qos_pri_media()) { 147 writel(0x1F0B0604, &s3c->s3crorr); 148 writel(0x1F0E0705, &s3c->s3cworr); 149 } else if (is_qos_pri_normal()) { 150 writel(0x1F0B0908, &s3c->s3crorr); 151 writel(0x1F0E0A08, &s3c->s3cworr); 152 } else if (is_qos_pri_gfx()) { 153 writel(0x1F0B0B0B, &s3c->s3crorr); 154 writel(0x1F0E0C0C, &s3c->s3cworr); 155 } 156 } else { 157 writel(0x00FF1B1D, &s3c->s3cadsplcr); 158 writel(0x1F0D0C0C, &s3c->s3crorr); 159 writel(0x1F0D0C0A, &s3c->s3cworr); 160 } 161 /* QoS Control Registers */ 162 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI0_BASE; 163 writel(0x00890089, &s3c_qos->s3cqos0); 164 writel(0x20960010, &s3c_qos->s3cqos1); 165 writel(0x20302030, &s3c_qos->s3cqos2); 166 167 if (IS_R8A7791_ES2()) { 168 if (is_qos_pri_media()) 169 writel(0x20AA2300, &s3c_qos->s3cqos3); 170 else if (is_qos_pri_normal()) 171 writel(0x20AA2200, &s3c_qos->s3cqos3); 172 else if (is_qos_pri_gfx()) 173 writel(0x20AA2100, &s3c_qos->s3cqos3); 174 } else { 175 writel(0x20AA2200, &s3c_qos->s3cqos3); 176 } 177 writel(0x00002032, &s3c_qos->s3cqos4); 178 writel(0x20960010, &s3c_qos->s3cqos5); 179 writel(0x20302030, &s3c_qos->s3cqos6); 180 181 if (IS_R8A7791_ES2()) { 182 if (is_qos_pri_media()) 183 writel(0x20AA2300, &s3c_qos->s3cqos7); 184 else if (is_qos_pri_normal()) 185 writel(0x20AA2200, &s3c_qos->s3cqos7); 186 else if (is_qos_pri_gfx()) 187 writel(0x20AA2100, &s3c_qos->s3cqos7); 188 } else { 189 writel(0x20AA2200, &s3c_qos->s3cqos7); 190 } 191 writel(0x00002032, &s3c_qos->s3cqos8); 192 193 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI1_BASE; 194 writel(0x00890089, &s3c_qos->s3cqos0); 195 writel(0x20960010, &s3c_qos->s3cqos1); 196 writel(0x20302030, &s3c_qos->s3cqos2); 197 if (IS_R8A7791_ES2()) { 198 if (is_qos_pri_media()) 199 writel(0x20AA2300, &s3c_qos->s3cqos3); 200 else if (is_qos_pri_normal()) 201 writel(0x20AA2200, &s3c_qos->s3cqos3); 202 else if (is_qos_pri_gfx()) 203 writel(0x20AA2100, &s3c_qos->s3cqos3); 204 } else { 205 writel(0x20AA2200, &s3c_qos->s3cqos3); 206 } 207 writel(0x00002032, &s3c_qos->s3cqos4); 208 writel(0x20960010, &s3c_qos->s3cqos5); 209 writel(0x20302030, &s3c_qos->s3cqos6); 210 if (IS_R8A7791_ES2()) { 211 if (is_qos_pri_media()) 212 writel(0x20AA2300, &s3c_qos->s3cqos7); 213 else if (is_qos_pri_normal()) 214 writel(0x20AA2200, &s3c_qos->s3cqos7); 215 else if (is_qos_pri_gfx()) 216 writel(0x20AA2100, &s3c_qos->s3cqos7); 217 } else { 218 writel(0x20AA2200, &s3c_qos->s3cqos7); 219 } 220 writel(0x00002032, &s3c_qos->s3cqos8); 221 222 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_MXI_BASE; 223 if (IS_R8A7791_ES2()) 224 writel(0x80928092, &s3c_qos->s3cqos0); 225 else 226 writel(0x00820082, &s3c_qos->s3cqos0); 227 writel(0x20960020, &s3c_qos->s3cqos1); 228 writel(0x20302030, &s3c_qos->s3cqos2); 229 writel(0x20AA20DC, &s3c_qos->s3cqos3); 230 writel(0x00002032, &s3c_qos->s3cqos4); 231 writel(0x20960020, &s3c_qos->s3cqos5); 232 writel(0x20302030, &s3c_qos->s3cqos6); 233 writel(0x20AA20DC, &s3c_qos->s3cqos7); 234 writel(0x00002032, &s3c_qos->s3cqos8); 235 236 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_AXI_BASE; 237 if (IS_R8A7791_ES2()) 238 writel(0x80928092, &s3c_qos->s3cqos0); 239 else 240 writel(0x00820082, &s3c_qos->s3cqos0); 241 writel(0x20960020, &s3c_qos->s3cqos1); 242 writel(0x20302030, &s3c_qos->s3cqos2); 243 writel(0x20AA20FA, &s3c_qos->s3cqos3); 244 writel(0x00002032, &s3c_qos->s3cqos4); 245 writel(0x20960020, &s3c_qos->s3cqos5); 246 writel(0x20302030, &s3c_qos->s3cqos6); 247 writel(0x20AA20FA, &s3c_qos->s3cqos7); 248 writel(0x00002032, &s3c_qos->s3cqos8); 249 250 /* DBSC -QoS */ 251 /* DBSC0 - Read */ 252 for (i = DBSC3_00; i < DBSC3_NR; i++) { 253 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_r_qos_addr[i]; 254 writel(0x00000002, &qos_addr->dblgcnt); 255 writel(0x00002096, &qos_addr->dbtmval0); 256 writel(0x00002064, &qos_addr->dbtmval1); 257 writel(0x00002032, &qos_addr->dbtmval2); 258 writel(0x00001FB0, &qos_addr->dbtmval3); 259 writel(0x00000001, &qos_addr->dbrqctr); 260 writel(0x00002078, &qos_addr->dbthres0); 261 writel(0x0000204B, &qos_addr->dbthres1); 262 writel(0x0000201E, &qos_addr->dbthres2); 263 writel(0x00000001, &qos_addr->dblgqon); 264 } 265 266 /* DBSC0 - Write */ 267 for (i = DBSC3_00; i < DBSC3_NR; i++) { 268 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_w_qos_addr[i]; 269 writel(0x00000002, &qos_addr->dblgcnt); 270 writel(0x00002096, &qos_addr->dbtmval0); 271 writel(0x00002064, &qos_addr->dbtmval1); 272 writel(0x00002050, &qos_addr->dbtmval2); 273 writel(0x0000203A, &qos_addr->dbtmval3); 274 writel(0x00000001, &qos_addr->dbrqctr); 275 writel(0x00002078, &qos_addr->dbthres0); 276 writel(0x0000204B, &qos_addr->dbthres1); 277 writel(0x0000203C, &qos_addr->dbthres2); 278 writel(0x00000001, &qos_addr->dblgqon); 279 } 280 281 /* DBSC1 - Read */ 282 for (i = DBSC3_00; i < DBSC3_NR; i++) { 283 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_1_r_qos_addr[i]; 284 writel(0x00000002, &qos_addr->dblgcnt); 285 writel(0x00002096, &qos_addr->dbtmval0); 286 writel(0x00002064, &qos_addr->dbtmval1); 287 writel(0x00002032, &qos_addr->dbtmval2); 288 writel(0x00001FB0, &qos_addr->dbtmval3); 289 writel(0x00000001, &qos_addr->dbrqctr); 290 writel(0x00002078, &qos_addr->dbthres0); 291 writel(0x0000204B, &qos_addr->dbthres1); 292 writel(0x0000201E, &qos_addr->dbthres2); 293 writel(0x00000001, &qos_addr->dblgqon); 294 } 295 296 /* DBSC1 - Write */ 297 for (i = DBSC3_00; i < DBSC3_NR; i++) { 298 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_1_w_qos_addr[i]; 299 writel(0x00000002, &qos_addr->dblgcnt); 300 writel(0x00002096, &qos_addr->dbtmval0); 301 writel(0x00002064, &qos_addr->dbtmval1); 302 writel(0x00002050, &qos_addr->dbtmval2); 303 writel(0x0000203A, &qos_addr->dbtmval3); 304 writel(0x00000001, &qos_addr->dbrqctr); 305 writel(0x00002078, &qos_addr->dbthres0); 306 writel(0x0000204B, &qos_addr->dbthres1); 307 writel(0x0000203C, &qos_addr->dbthres2); 308 writel(0x00000001, &qos_addr->dblgqon); 309 } 310 311 /* CCI-400 -QoS */ 312 writel(0x20001000, CCI_400_MAXOT_1); 313 writel(0x20001000, CCI_400_MAXOT_2); 314 writel(0x0000000C, CCI_400_QOSCNTL_1); 315 writel(0x0000000C, CCI_400_QOSCNTL_2); 316 317 /* MXI -QoS */ 318 /* Transaction Control (MXI) */ 319 mxi = (struct rcar_mxi *)XI_BASE; 320 writel(0x00000013, &mxi->mxrtcr); 321 if (IS_R8A7791_ES2()) { 322 writel(0x00000016, &mxi->mxwtcr); 323 writel(0x00780080, &mxi->mxsaar0); 324 writel(0x02000800, &mxi->mxsaar1); 325 } else { 326 writel(0x00000013, &mxi->mxwtcr); 327 } 328 329 /* QoS Control (MXI) */ 330 mxi_qos = (struct rcar_mxi_qos *)MXI_QOS_BASE; 331 writel(0x0000000C, &mxi_qos->vspdu0); 332 writel(0x0000000C, &mxi_qos->vspdu1); 333 writel(0x0000000E, &mxi_qos->du0); 334 writel(0x0000000D, &mxi_qos->du1); 335 336 /* AXI -QoS */ 337 /* Transaction Control (MXI) */ 338 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SYX64TO128_BASE; 339 writel(0x00000002, &axi_qos->qosconf); 340 writel(0x00002245, &axi_qos->qosctset0); 341 writel(0x00002096, &axi_qos->qosctset1); 342 writel(0x00002030, &axi_qos->qosctset2); 343 writel(0x00002030, &axi_qos->qosctset3); 344 writel(0x00000001, &axi_qos->qosreqctr); 345 writel(0x00002064, &axi_qos->qosthres0); 346 writel(0x00002004, &axi_qos->qosthres1); 347 writel(0x00000000, &axi_qos->qosthres2); 348 writel(0x00000001, &axi_qos->qosqon); 349 350 axi_qos = (struct rcar_axi_qos *)SYS_AXI_AVB_BASE; 351 writel(0x00000000, &axi_qos->qosconf); 352 writel(0x000020A6, &axi_qos->qosctset0); 353 writel(0x00000001, &axi_qos->qosreqctr); 354 writel(0x00002064, &axi_qos->qosthres0); 355 writel(0x00002004, &axi_qos->qosthres1); 356 writel(0x00000000, &axi_qos->qosthres2); 357 writel(0x00000001, &axi_qos->qosqon); 358 359 axi_qos = (struct rcar_axi_qos *)SYS_AXI_G2D_BASE; 360 writel(0x00000000, &axi_qos->qosconf); 361 writel(0x000020A6, &axi_qos->qosctset0); 362 writel(0x00000001, &axi_qos->qosreqctr); 363 writel(0x00002064, &axi_qos->qosthres0); 364 writel(0x00002004, &axi_qos->qosthres1); 365 writel(0x00000000, &axi_qos->qosthres2); 366 writel(0x00000001, &axi_qos->qosqon); 367 368 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMP0_BASE; 369 writel(0x00000000, &axi_qos->qosconf); 370 writel(0x00002021, &axi_qos->qosctset0); 371 writel(0x00000001, &axi_qos->qosreqctr); 372 writel(0x00002064, &axi_qos->qosthres0); 373 writel(0x00002004, &axi_qos->qosthres1); 374 writel(0x00000000, &axi_qos->qosthres2); 375 writel(0x00000001, &axi_qos->qosqon); 376 377 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMP1_BASE; 378 writel(0x00000000, &axi_qos->qosconf); 379 writel(0x00002037, &axi_qos->qosctset0); 380 writel(0x00000001, &axi_qos->qosreqctr); 381 writel(0x00002064, &axi_qos->qosthres0); 382 writel(0x00002004, &axi_qos->qosthres1); 383 writel(0x00000000, &axi_qos->qosthres2); 384 writel(0x00000001, &axi_qos->qosqon); 385 386 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX0_BASE; 387 writel(0x00000002, &axi_qos->qosconf); 388 writel(0x00002245, &axi_qos->qosctset0); 389 writel(0x00002096, &axi_qos->qosctset1); 390 writel(0x00002030, &axi_qos->qosctset2); 391 writel(0x00002030, &axi_qos->qosctset3); 392 writel(0x00000001, &axi_qos->qosreqctr); 393 writel(0x00002064, &axi_qos->qosthres0); 394 writel(0x00002004, &axi_qos->qosthres1); 395 writel(0x00000000, &axi_qos->qosthres2); 396 writel(0x00000001, &axi_qos->qosqon); 397 398 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX1_BASE; 399 writel(0x00000002, &axi_qos->qosconf); 400 writel(0x00002245, &axi_qos->qosctset0); 401 writel(0x00002096, &axi_qos->qosctset1); 402 writel(0x00002030, &axi_qos->qosctset2); 403 writel(0x00002030, &axi_qos->qosctset3); 404 writel(0x00000001, &axi_qos->qosreqctr); 405 writel(0x00002064, &axi_qos->qosthres0); 406 writel(0x00002004, &axi_qos->qosthres1); 407 writel(0x00000000, &axi_qos->qosthres2); 408 writel(0x00000001, &axi_qos->qosqon); 409 410 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX2_BASE; 411 writel(0x00000002, &axi_qos->qosconf); 412 writel(0x00002245, &axi_qos->qosctset0); 413 writel(0x00002096, &axi_qos->qosctset1); 414 writel(0x00002030, &axi_qos->qosctset2); 415 writel(0x00002030, &axi_qos->qosctset3); 416 writel(0x00000001, &axi_qos->qosreqctr); 417 writel(0x00002064, &axi_qos->qosthres0); 418 writel(0x00002004, &axi_qos->qosthres1); 419 writel(0x00000000, &axi_qos->qosthres2); 420 writel(0x00000001, &axi_qos->qosqon); 421 422 axi_qos = (struct rcar_axi_qos *)SYS_AXI_LBS_BASE; 423 writel(0x00000000, &axi_qos->qosconf); 424 writel(0x0000214C, &axi_qos->qosctset0); 425 writel(0x00000001, &axi_qos->qosreqctr); 426 writel(0x00002064, &axi_qos->qosthres0); 427 writel(0x00002004, &axi_qos->qosthres1); 428 writel(0x00000000, &axi_qos->qosthres2); 429 writel(0x00000001, &axi_qos->qosqon); 430 431 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUDS_BASE; 432 writel(0x00000001, &axi_qos->qosconf); 433 writel(0x00002004, &axi_qos->qosctset0); 434 writel(0x00002096, &axi_qos->qosctset1); 435 writel(0x00002030, &axi_qos->qosctset2); 436 writel(0x00002030, &axi_qos->qosctset3); 437 writel(0x00000001, &axi_qos->qosreqctr); 438 writel(0x00002064, &axi_qos->qosthres0); 439 writel(0x00002004, &axi_qos->qosthres1); 440 writel(0x00000000, &axi_qos->qosthres2); 441 writel(0x00000001, &axi_qos->qosqon); 442 443 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUM_BASE; 444 writel(0x00000001, &axi_qos->qosconf); 445 writel(0x00002004, &axi_qos->qosctset0); 446 writel(0x00002096, &axi_qos->qosctset1); 447 writel(0x00002030, &axi_qos->qosctset2); 448 writel(0x00002030, &axi_qos->qosctset3); 449 writel(0x00000001, &axi_qos->qosreqctr); 450 writel(0x00002064, &axi_qos->qosthres0); 451 writel(0x00002004, &axi_qos->qosthres1); 452 writel(0x00000000, &axi_qos->qosthres2); 453 writel(0x00000001, &axi_qos->qosqon); 454 455 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUR_BASE; 456 writel(0x00000001, &axi_qos->qosconf); 457 writel(0x00002004, &axi_qos->qosctset0); 458 writel(0x00002096, &axi_qos->qosctset1); 459 writel(0x00002030, &axi_qos->qosctset2); 460 writel(0x00002030, &axi_qos->qosctset3); 461 writel(0x00000001, &axi_qos->qosreqctr); 462 writel(0x00002064, &axi_qos->qosthres0); 463 writel(0x00002004, &axi_qos->qosthres1); 464 writel(0x00000000, &axi_qos->qosthres2); 465 writel(0x00000001, &axi_qos->qosqon); 466 467 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS0_BASE; 468 writel(0x00000001, &axi_qos->qosconf); 469 writel(0x00002004, &axi_qos->qosctset0); 470 writel(0x00002096, &axi_qos->qosctset1); 471 writel(0x00002030, &axi_qos->qosctset2); 472 writel(0x00002030, &axi_qos->qosctset3); 473 writel(0x00000001, &axi_qos->qosreqctr); 474 writel(0x00002064, &axi_qos->qosthres0); 475 writel(0x00002004, &axi_qos->qosthres1); 476 writel(0x00000000, &axi_qos->qosthres2); 477 writel(0x00000001, &axi_qos->qosqon); 478 479 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS1_BASE; 480 writel(0x00000001, &axi_qos->qosconf); 481 writel(0x00002004, &axi_qos->qosctset0); 482 writel(0x00002096, &axi_qos->qosctset1); 483 writel(0x00002030, &axi_qos->qosctset2); 484 writel(0x00002030, &axi_qos->qosctset3); 485 writel(0x00000001, &axi_qos->qosreqctr); 486 writel(0x00002064, &axi_qos->qosthres0); 487 writel(0x00002004, &axi_qos->qosthres1); 488 writel(0x00000000, &axi_qos->qosthres2); 489 writel(0x00000001, &axi_qos->qosqon); 490 491 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MTSB0_BASE; 492 writel(0x00000000, &axi_qos->qosconf); 493 writel(0x00002021, &axi_qos->qosctset0); 494 writel(0x00000001, &axi_qos->qosreqctr); 495 writel(0x00002064, &axi_qos->qosthres0); 496 writel(0x00002004, &axi_qos->qosthres1); 497 writel(0x00000000, &axi_qos->qosthres2); 498 writel(0x00000001, &axi_qos->qosqon); 499 500 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MTSB1_BASE; 501 writel(0x00000000, &axi_qos->qosconf); 502 writel(0x00002021, &axi_qos->qosctset0); 503 writel(0x00000001, &axi_qos->qosreqctr); 504 writel(0x00002064, &axi_qos->qosthres0); 505 writel(0x00002004, &axi_qos->qosthres1); 506 writel(0x00000000, &axi_qos->qosthres2); 507 writel(0x00000001, &axi_qos->qosqon); 508 509 axi_qos = (struct rcar_axi_qos *)SYS_AXI_PCI_BASE; 510 writel(0x00000000, &axi_qos->qosconf); 511 writel(0x0000214C, &axi_qos->qosctset0); 512 writel(0x00000001, &axi_qos->qosreqctr); 513 writel(0x00002064, &axi_qos->qosthres0); 514 writel(0x00002004, &axi_qos->qosthres1); 515 writel(0x00000000, &axi_qos->qosthres2); 516 writel(0x00000001, &axi_qos->qosqon); 517 518 axi_qos = (struct rcar_axi_qos *)SYS_AXI_RTX_BASE; 519 writel(0x00000002, &axi_qos->qosconf); 520 writel(0x00002245, &axi_qos->qosctset0); 521 writel(0x00002096, &axi_qos->qosctset1); 522 writel(0x00002030, &axi_qos->qosctset2); 523 writel(0x00002030, &axi_qos->qosctset3); 524 writel(0x00000001, &axi_qos->qosreqctr); 525 writel(0x00002064, &axi_qos->qosthres0); 526 writel(0x00002004, &axi_qos->qosthres1); 527 writel(0x00000000, &axi_qos->qosthres2); 528 writel(0x00000001, &axi_qos->qosqon); 529 530 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS0_BASE; 531 writel(0x00000000, &axi_qos->qosconf); 532 writel(0x000020A6, &axi_qos->qosctset0); 533 writel(0x00000001, &axi_qos->qosreqctr); 534 writel(0x00002064, &axi_qos->qosthres0); 535 writel(0x00002004, &axi_qos->qosthres1); 536 writel(0x00000000, &axi_qos->qosthres2); 537 writel(0x00000001, &axi_qos->qosqon); 538 539 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS1_BASE; 540 writel(0x00000000, &axi_qos->qosconf); 541 writel(0x000020A6, &axi_qos->qosctset0); 542 writel(0x00000001, &axi_qos->qosreqctr); 543 writel(0x00002064, &axi_qos->qosthres0); 544 writel(0x00002004, &axi_qos->qosthres1); 545 writel(0x00000000, &axi_qos->qosthres2); 546 writel(0x00000001, &axi_qos->qosqon); 547 548 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB20_BASE; 549 writel(0x00000000, &axi_qos->qosconf); 550 writel(0x00002053, &axi_qos->qosctset0); 551 writel(0x00000001, &axi_qos->qosreqctr); 552 writel(0x00002064, &axi_qos->qosthres0); 553 writel(0x00002004, &axi_qos->qosthres1); 554 writel(0x00000000, &axi_qos->qosthres2); 555 writel(0x00000001, &axi_qos->qosqon); 556 557 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB21_BASE; 558 writel(0x00000000, &axi_qos->qosconf); 559 writel(0x00002053, &axi_qos->qosctset0); 560 writel(0x00000001, &axi_qos->qosreqctr); 561 writel(0x00002064, &axi_qos->qosthres0); 562 writel(0x00002004, &axi_qos->qosthres1); 563 writel(0x00000000, &axi_qos->qosthres2); 564 writel(0x00000001, &axi_qos->qosqon); 565 566 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB22_BASE; 567 writel(0x00000000, &axi_qos->qosconf); 568 writel(0x00002053, &axi_qos->qosctset0); 569 writel(0x00000001, &axi_qos->qosreqctr); 570 writel(0x00002064, &axi_qos->qosthres0); 571 writel(0x00002004, &axi_qos->qosthres1); 572 writel(0x00000000, &axi_qos->qosthres2); 573 writel(0x00000001, &axi_qos->qosqon); 574 575 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB30_BASE; 576 writel(0x00000000, &axi_qos->qosconf); 577 writel(0x0000214C, &axi_qos->qosctset0); 578 writel(0x00000001, &axi_qos->qosreqctr); 579 writel(0x00002064, &axi_qos->qosthres0); 580 writel(0x00002004, &axi_qos->qosthres1); 581 writel(0x00000000, &axi_qos->qosthres2); 582 writel(0x00000001, &axi_qos->qosqon); 583 584 axi_qos = (struct rcar_axi_qos *)SYS_AXI_AX2M_BASE; 585 writel(0x00000002, &axi_qos->qosconf); 586 writel(0x00002245, &axi_qos->qosctset0); 587 writel(0x00000001, &axi_qos->qosreqctr); 588 writel(0x00002064, &axi_qos->qosthres0); 589 writel(0x00002004, &axi_qos->qosthres1); 590 writel(0x00000000, &axi_qos->qosthres2); 591 writel(0x00000001, &axi_qos->qosqon); 592 593 axi_qos = (struct rcar_axi_qos *)SYS_AXI_CC50_BASE; 594 writel(0x00000000, &axi_qos->qosconf); 595 writel(0x00002029, &axi_qos->qosctset0); 596 writel(0x00000001, &axi_qos->qosreqctr); 597 writel(0x00002064, &axi_qos->qosthres0); 598 writel(0x00002004, &axi_qos->qosthres1); 599 writel(0x00000000, &axi_qos->qosthres2); 600 writel(0x00000001, &axi_qos->qosqon); 601 602 axi_qos = (struct rcar_axi_qos *)SYS_AXI_CCI_BASE; 603 writel(0x00000002, &axi_qos->qosconf); 604 writel(0x00002245, &axi_qos->qosctset0); 605 writel(0x00000001, &axi_qos->qosreqctr); 606 writel(0x00002064, &axi_qos->qosthres0); 607 writel(0x00002004, &axi_qos->qosthres1); 608 writel(0x00000000, &axi_qos->qosthres2); 609 writel(0x00000001, &axi_qos->qosqon); 610 611 axi_qos = (struct rcar_axi_qos *)SYS_AXI_CS_BASE; 612 writel(0x00000000, &axi_qos->qosconf); 613 writel(0x00002053, &axi_qos->qosctset0); 614 writel(0x00000001, &axi_qos->qosreqctr); 615 writel(0x00002064, &axi_qos->qosthres0); 616 writel(0x00002004, &axi_qos->qosthres1); 617 writel(0x00000000, &axi_qos->qosthres2); 618 writel(0x00000001, &axi_qos->qosqon); 619 620 axi_qos = (struct rcar_axi_qos *)SYS_AXI_DDM_BASE; 621 writel(0x00000000, &axi_qos->qosconf); 622 writel(0x000020A6, &axi_qos->qosctset0); 623 writel(0x00000001, &axi_qos->qosreqctr); 624 writel(0x00002064, &axi_qos->qosthres0); 625 writel(0x00002004, &axi_qos->qosthres1); 626 writel(0x00000000, &axi_qos->qosthres2); 627 writel(0x00000001, &axi_qos->qosqon); 628 629 axi_qos = (struct rcar_axi_qos *)SYS_AXI_ETH_BASE; 630 writel(0x00000000, &axi_qos->qosconf); 631 writel(0x00002053, &axi_qos->qosctset0); 632 writel(0x00000001, &axi_qos->qosreqctr); 633 writel(0x00002064, &axi_qos->qosthres0); 634 writel(0x00002004, &axi_qos->qosthres1); 635 writel(0x00000000, &axi_qos->qosthres2); 636 writel(0x00000001, &axi_qos->qosqon); 637 638 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MPXM_BASE; 639 writel(0x00000002, &axi_qos->qosconf); 640 writel(0x00002245, &axi_qos->qosctset0); 641 writel(0x00000001, &axi_qos->qosreqctr); 642 writel(0x00002064, &axi_qos->qosthres0); 643 writel(0x00002004, &axi_qos->qosthres1); 644 writel(0x00000000, &axi_qos->qosthres2); 645 writel(0x00000001, &axi_qos->qosqon); 646 647 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SAT0_BASE; 648 writel(0x00000000, &axi_qos->qosconf); 649 writel(0x00002053, &axi_qos->qosctset0); 650 writel(0x00000001, &axi_qos->qosreqctr); 651 writel(0x00002064, &axi_qos->qosthres0); 652 writel(0x00002004, &axi_qos->qosthres1); 653 writel(0x00000000, &axi_qos->qosthres2); 654 writel(0x00000001, &axi_qos->qosqon); 655 656 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SAT1_BASE; 657 writel(0x00000000, &axi_qos->qosconf); 658 writel(0x00002053, &axi_qos->qosctset0); 659 writel(0x00000001, &axi_qos->qosreqctr); 660 writel(0x00002064, &axi_qos->qosthres0); 661 writel(0x00002004, &axi_qos->qosthres1); 662 writel(0x00000000, &axi_qos->qosthres2); 663 writel(0x00000001, &axi_qos->qosqon); 664 665 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM0_BASE; 666 writel(0x00000000, &axi_qos->qosconf); 667 writel(0x0000214C, &axi_qos->qosctset0); 668 writel(0x00000001, &axi_qos->qosreqctr); 669 writel(0x00002064, &axi_qos->qosthres0); 670 writel(0x00002004, &axi_qos->qosthres1); 671 writel(0x00000000, &axi_qos->qosthres2); 672 writel(0x00000001, &axi_qos->qosqon); 673 674 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM1_BASE; 675 writel(0x00000000, &axi_qos->qosconf); 676 writel(0x0000214C, &axi_qos->qosctset0); 677 writel(0x00000001, &axi_qos->qosreqctr); 678 writel(0x00002064, &axi_qos->qosthres0); 679 writel(0x00002004, &axi_qos->qosthres1); 680 writel(0x00000000, &axi_qos->qosthres2); 681 writel(0x00000001, &axi_qos->qosqon); 682 683 axi_qos = (struct rcar_axi_qos *)SYS_AXI_TRAB_BASE; 684 writel(0x00000000, &axi_qos->qosconf); 685 writel(0x000020A6, &axi_qos->qosctset0); 686 writel(0x00000001, &axi_qos->qosreqctr); 687 writel(0x00002064, &axi_qos->qosthres0); 688 writel(0x00002004, &axi_qos->qosthres1); 689 writel(0x00000000, &axi_qos->qosthres2); 690 writel(0x00000001, &axi_qos->qosqon); 691 692 axi_qos = (struct rcar_axi_qos *)SYS_AXI_UDM0_BASE; 693 writel(0x00000000, &axi_qos->qosconf); 694 writel(0x00002053, &axi_qos->qosctset0); 695 writel(0x00000001, &axi_qos->qosreqctr); 696 writel(0x00002064, &axi_qos->qosthres0); 697 writel(0x00002004, &axi_qos->qosthres1); 698 writel(0x00000000, &axi_qos->qosthres2); 699 writel(0x00000001, &axi_qos->qosqon); 700 701 axi_qos = (struct rcar_axi_qos *)SYS_AXI_UDM1_BASE; 702 writel(0x00000000, &axi_qos->qosconf); 703 writel(0x00002053, &axi_qos->qosctset0); 704 writel(0x00000001, &axi_qos->qosreqctr); 705 writel(0x00002064, &axi_qos->qosthres0); 706 writel(0x00002004, &axi_qos->qosthres1); 707 writel(0x00000000, &axi_qos->qosthres2); 708 writel(0x00000001, &axi_qos->qosqon); 709 710 /* QoS Register (RT-AXI) */ 711 axi_qos = (struct rcar_axi_qos *)RT_AXI_SHX_BASE; 712 if (IS_R8A7791_ES2()) 713 writel(0x00000001, &axi_qos->qosconf); 714 else 715 writel(0x00000000, &axi_qos->qosconf); 716 writel(0x00002053, &axi_qos->qosctset0); 717 writel(0x00002096, &axi_qos->qosctset1); 718 writel(0x00002030, &axi_qos->qosctset2); 719 writel(0x00002030, &axi_qos->qosctset3); 720 writel(0x00000001, &axi_qos->qosreqctr); 721 writel(0x00002064, &axi_qos->qosthres0); 722 writel(0x00002004, &axi_qos->qosthres1); 723 writel(0x00000000, &axi_qos->qosthres2); 724 writel(0x00000001, &axi_qos->qosqon); 725 726 axi_qos = (struct rcar_axi_qos *)RT_AXI_DBG_BASE; 727 writel(0x00000000, &axi_qos->qosconf); 728 writel(0x00002053, &axi_qos->qosctset0); 729 writel(0x00002096, &axi_qos->qosctset1); 730 writel(0x00002030, &axi_qos->qosctset2); 731 writel(0x00002030, &axi_qos->qosctset3); 732 writel(0x00000001, &axi_qos->qosreqctr); 733 writel(0x00002064, &axi_qos->qosthres0); 734 writel(0x00002004, &axi_qos->qosthres1); 735 writel(0x00000000, &axi_qos->qosthres2); 736 writel(0x00000001, &axi_qos->qosqon); 737 738 axi_qos = (struct rcar_axi_qos *)RT_AXI_RDM_BASE; 739 writel(0x00000000, &axi_qos->qosconf); 740 writel(0x00002299, &axi_qos->qosctset0); 741 writel(0x00000001, &axi_qos->qosreqctr); 742 writel(0x00002064, &axi_qos->qosthres0); 743 writel(0x00002004, &axi_qos->qosthres1); 744 writel(0x00000000, &axi_qos->qosthres2); 745 writel(0x00000001, &axi_qos->qosqon); 746 747 axi_qos = (struct rcar_axi_qos *)RT_AXI_RDS_BASE; 748 writel(0x00000000, &axi_qos->qosconf); 749 writel(0x00002029, &axi_qos->qosctset0); 750 writel(0x00000001, &axi_qos->qosreqctr); 751 writel(0x00002064, &axi_qos->qosthres0); 752 writel(0x00002004, &axi_qos->qosthres1); 753 writel(0x00000000, &axi_qos->qosthres2); 754 writel(0x00000001, &axi_qos->qosqon); 755 756 axi_qos = (struct rcar_axi_qos *)RT_AXI_RTX64TO128_BASE; 757 writel(0x00000002, &axi_qos->qosconf); 758 writel(0x00002245, &axi_qos->qosctset0); 759 writel(0x00002096, &axi_qos->qosctset1); 760 writel(0x00002030, &axi_qos->qosctset2); 761 writel(0x00002030, &axi_qos->qosctset3); 762 writel(0x00000001, &axi_qos->qosreqctr); 763 writel(0x00002064, &axi_qos->qosthres0); 764 writel(0x00002004, &axi_qos->qosthres1); 765 writel(0x00000000, &axi_qos->qosthres2); 766 writel(0x00000001, &axi_qos->qosqon); 767 768 axi_qos = (struct rcar_axi_qos *)RT_AXI_STPRO_BASE; 769 writel(0x00000000, &axi_qos->qosconf); 770 writel(0x00002029, &axi_qos->qosctset0); 771 writel(0x00002096, &axi_qos->qosctset1); 772 writel(0x00002030, &axi_qos->qosctset2); 773 writel(0x00002030, &axi_qos->qosctset3); 774 writel(0x00000001, &axi_qos->qosreqctr); 775 writel(0x00002064, &axi_qos->qosthres0); 776 writel(0x00002004, &axi_qos->qosthres1); 777 writel(0x00000000, &axi_qos->qosthres2); 778 writel(0x00000001, &axi_qos->qosqon); 779 780 axi_qos = (struct rcar_axi_qos *)RT_AXI_SY2RT_BASE; 781 writel(0x00000002, &axi_qos->qosconf); 782 writel(0x00002245, &axi_qos->qosctset0); 783 writel(0x00000001, &axi_qos->qosreqctr); 784 writel(0x00002064, &axi_qos->qosthres0); 785 writel(0x00002004, &axi_qos->qosthres1); 786 writel(0x00000000, &axi_qos->qosthres2); 787 writel(0x00000001, &axi_qos->qosqon); 788 789 /* QoS Register (MP-AXI) */ 790 axi_qos = (struct rcar_axi_qos *)MP_AXI_ADSP_BASE; 791 writel(0x00000000, &axi_qos->qosconf); 792 writel(0x00002037, &axi_qos->qosctset0); 793 writel(0x00000001, &axi_qos->qosreqctr); 794 writel(0x00002064, &axi_qos->qosthres0); 795 writel(0x00002004, &axi_qos->qosthres1); 796 writel(0x00000000, &axi_qos->qosthres2); 797 writel(0x00000001, &axi_qos->qosqon); 798 799 axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS0_BASE; 800 writel(0x00000001, &axi_qos->qosconf); 801 writel(0x00002014, &axi_qos->qosctset0); 802 writel(0x00000040, &axi_qos->qosreqctr); 803 writel(0x00002064, &axi_qos->qosthres0); 804 writel(0x00002004, &axi_qos->qosthres1); 805 writel(0x00000000, &axi_qos->qosthres2); 806 writel(0x00000001, &axi_qos->qosqon); 807 808 axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS1_BASE; 809 writel(0x00000001, &axi_qos->qosconf); 810 writel(0x00002014, &axi_qos->qosctset0); 811 writel(0x00000040, &axi_qos->qosreqctr); 812 writel(0x00002064, &axi_qos->qosthres0); 813 writel(0x00002004, &axi_qos->qosthres1); 814 writel(0x00000000, &axi_qos->qosthres2); 815 writel(0x00000001, &axi_qos->qosqon); 816 817 axi_qos = (struct rcar_axi_qos *)MP_AXI_MLP_BASE; 818 writel(0x00000001, &axi_qos->qosconf); 819 writel(0x00001FF0, &axi_qos->qosctset0); 820 writel(0x00000020, &axi_qos->qosreqctr); 821 writel(0x00002064, &axi_qos->qosthres0); 822 writel(0x00002004, &axi_qos->qosthres1); 823 writel(0x00002001, &axi_qos->qosthres2); 824 writel(0x00000001, &axi_qos->qosqon); 825 826 axi_qos = (struct rcar_axi_qos *)MP_AXI_MMUMP_BASE; 827 writel(0x00000001, &axi_qos->qosconf); 828 writel(0x00002004, &axi_qos->qosctset0); 829 writel(0x00002096, &axi_qos->qosctset1); 830 writel(0x00002030, &axi_qos->qosctset2); 831 writel(0x00002030, &axi_qos->qosctset3); 832 writel(0x00000001, &axi_qos->qosreqctr); 833 writel(0x00002064, &axi_qos->qosthres0); 834 writel(0x00002004, &axi_qos->qosthres1); 835 writel(0x00000000, &axi_qos->qosthres2); 836 writel(0x00000001, &axi_qos->qosqon); 837 838 axi_qos = (struct rcar_axi_qos *)MP_AXI_SPU_BASE; 839 writel(0x00000000, &axi_qos->qosconf); 840 writel(0x00002053, &axi_qos->qosctset0); 841 writel(0x00000001, &axi_qos->qosreqctr); 842 writel(0x00002064, &axi_qos->qosthres0); 843 writel(0x00002004, &axi_qos->qosthres1); 844 writel(0x00000000, &axi_qos->qosthres2); 845 writel(0x00000001, &axi_qos->qosqon); 846 847 axi_qos = (struct rcar_axi_qos *)MP_AXI_SPUC_BASE; 848 writel(0x00000000, &axi_qos->qosconf); 849 writel(0x0000206E, &axi_qos->qosctset0); 850 writel(0x00000001, &axi_qos->qosreqctr); 851 writel(0x00002064, &axi_qos->qosthres0); 852 writel(0x00002004, &axi_qos->qosthres1); 853 writel(0x00000000, &axi_qos->qosthres2); 854 writel(0x00000001, &axi_qos->qosqon); 855 856 /* QoS Register (SYS-AXI256) */ 857 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_AXI128TO256_BASE; 858 writel(0x00000002, &axi_qos->qosconf); 859 if (IS_R8A7791_ES2()) 860 writel(0x000020EB, &axi_qos->qosctset0); 861 else 862 writel(0x00002245, &axi_qos->qosctset0); 863 writel(0x00002096, &axi_qos->qosctset1); 864 writel(0x00002030, &axi_qos->qosctset2); 865 writel(0x00002030, &axi_qos->qosctset3); 866 writel(0x00000001, &axi_qos->qosreqctr); 867 writel(0x00002064, &axi_qos->qosthres0); 868 writel(0x00002004, &axi_qos->qosthres1); 869 writel(0x00000000, &axi_qos->qosthres2); 870 writel(0x00000001, &axi_qos->qosqon); 871 872 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_SYX_BASE; 873 writel(0x00000002, &axi_qos->qosconf); 874 if (IS_R8A7791_ES2()) 875 writel(0x000020EB, &axi_qos->qosctset0); 876 else 877 writel(0x00002245, &axi_qos->qosctset0); 878 writel(0x00002096, &axi_qos->qosctset1); 879 writel(0x00002030, &axi_qos->qosctset2); 880 writel(0x00002030, &axi_qos->qosctset3); 881 writel(0x00000001, &axi_qos->qosreqctr); 882 writel(0x00002064, &axi_qos->qosthres0); 883 writel(0x00002004, &axi_qos->qosthres1); 884 writel(0x00000000, &axi_qos->qosthres2); 885 writel(0x00000001, &axi_qos->qosqon); 886 887 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MPX_BASE; 888 writel(0x00000002, &axi_qos->qosconf); 889 if (IS_R8A7791_ES2()) 890 writel(0x000020EB, &axi_qos->qosctset0); 891 else 892 writel(0x00002245, &axi_qos->qosctset0); 893 writel(0x00002096, &axi_qos->qosctset1); 894 writel(0x00002030, &axi_qos->qosctset2); 895 writel(0x00002030, &axi_qos->qosctset3); 896 writel(0x00000001, &axi_qos->qosreqctr); 897 writel(0x00002064, &axi_qos->qosthres0); 898 writel(0x00002004, &axi_qos->qosthres1); 899 writel(0x00000000, &axi_qos->qosthres2); 900 writel(0x00000001, &axi_qos->qosqon); 901 902 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MXI_BASE; 903 writel(0x00000002, &axi_qos->qosconf); 904 writel(0x00002245, &axi_qos->qosctset0); 905 writel(0x00002096, &axi_qos->qosctset1); 906 writel(0x00002030, &axi_qos->qosctset2); 907 writel(0x00002030, &axi_qos->qosctset3); 908 writel(0x00000001, &axi_qos->qosreqctr); 909 writel(0x00002064, &axi_qos->qosthres0); 910 writel(0x00002004, &axi_qos->qosthres1); 911 writel(0x00000000, &axi_qos->qosthres2); 912 writel(0x00000001, &axi_qos->qosqon); 913 914 /* QoS Register (CCI-AXI) */ 915 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS0_BASE; 916 writel(0x00000001, &axi_qos->qosconf); 917 writel(0x00002004, &axi_qos->qosctset0); 918 writel(0x00002096, &axi_qos->qosctset1); 919 writel(0x00002030, &axi_qos->qosctset2); 920 writel(0x00002030, &axi_qos->qosctset3); 921 writel(0x00000001, &axi_qos->qosreqctr); 922 writel(0x00002064, &axi_qos->qosthres0); 923 writel(0x00002004, &axi_qos->qosthres1); 924 writel(0x00000000, &axi_qos->qosthres2); 925 writel(0x00000001, &axi_qos->qosqon); 926 927 axi_qos = (struct rcar_axi_qos *)CCI_AXI_SYX2_BASE; 928 writel(0x00000002, &axi_qos->qosconf); 929 writel(0x00002245, &axi_qos->qosctset0); 930 writel(0x00002096, &axi_qos->qosctset1); 931 writel(0x00002030, &axi_qos->qosctset2); 932 writel(0x00002030, &axi_qos->qosctset3); 933 writel(0x00000001, &axi_qos->qosreqctr); 934 writel(0x00002064, &axi_qos->qosthres0); 935 writel(0x00002004, &axi_qos->qosthres1); 936 writel(0x00000000, &axi_qos->qosthres2); 937 writel(0x00000001, &axi_qos->qosqon); 938 939 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUR_BASE; 940 writel(0x00000001, &axi_qos->qosconf); 941 writel(0x00002004, &axi_qos->qosctset0); 942 writel(0x00002096, &axi_qos->qosctset1); 943 writel(0x00002030, &axi_qos->qosctset2); 944 writel(0x00002030, &axi_qos->qosctset3); 945 writel(0x00000001, &axi_qos->qosreqctr); 946 writel(0x00002064, &axi_qos->qosthres0); 947 writel(0x00002004, &axi_qos->qosthres1); 948 writel(0x00000000, &axi_qos->qosthres2); 949 writel(0x00000001, &axi_qos->qosqon); 950 951 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUDS_BASE; 952 writel(0x00000001, &axi_qos->qosconf); 953 writel(0x00002004, &axi_qos->qosctset0); 954 writel(0x00002096, &axi_qos->qosctset1); 955 writel(0x00002030, &axi_qos->qosctset2); 956 writel(0x00002030, &axi_qos->qosctset3); 957 writel(0x00000001, &axi_qos->qosreqctr); 958 writel(0x00002064, &axi_qos->qosthres0); 959 writel(0x00002004, &axi_qos->qosthres1); 960 writel(0x00000000, &axi_qos->qosthres2); 961 writel(0x00000001, &axi_qos->qosqon); 962 963 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUM_BASE; 964 writel(0x00000001, &axi_qos->qosconf); 965 writel(0x00002004, &axi_qos->qosctset0); 966 writel(0x00002096, &axi_qos->qosctset1); 967 writel(0x00002030, &axi_qos->qosctset2); 968 writel(0x00002030, &axi_qos->qosctset3); 969 writel(0x00000001, &axi_qos->qosreqctr); 970 writel(0x00002064, &axi_qos->qosthres0); 971 writel(0x00002004, &axi_qos->qosthres1); 972 writel(0x00000000, &axi_qos->qosthres2); 973 writel(0x00000001, &axi_qos->qosqon); 974 975 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MXI_BASE; 976 writel(0x00000002, &axi_qos->qosconf); 977 writel(0x00002245, &axi_qos->qosctset0); 978 writel(0x00002096, &axi_qos->qosctset1); 979 writel(0x00002030, &axi_qos->qosctset2); 980 writel(0x00002030, &axi_qos->qosctset3); 981 writel(0x00000001, &axi_qos->qosreqctr); 982 writel(0x00002064, &axi_qos->qosthres0); 983 writel(0x00002004, &axi_qos->qosthres1); 984 writel(0x00000000, &axi_qos->qosthres2); 985 writel(0x00000001, &axi_qos->qosqon); 986 987 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS1_BASE; 988 writel(0x00000001, &axi_qos->qosconf); 989 writel(0x00002004, &axi_qos->qosctset0); 990 writel(0x00002096, &axi_qos->qosctset1); 991 writel(0x00002030, &axi_qos->qosctset2); 992 writel(0x00002030, &axi_qos->qosctset3); 993 writel(0x00000001, &axi_qos->qosreqctr); 994 writel(0x00002064, &axi_qos->qosthres0); 995 writel(0x00002004, &axi_qos->qosthres1); 996 writel(0x00000000, &axi_qos->qosthres2); 997 writel(0x00000001, &axi_qos->qosqon); 998 999 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUMP_BASE; 1000 writel(0x00000001, &axi_qos->qosconf); 1001 writel(0x00002004, &axi_qos->qosctset0); 1002 writel(0x00002096, &axi_qos->qosctset1); 1003 writel(0x00002030, &axi_qos->qosctset2); 1004 writel(0x00002030, &axi_qos->qosctset3); 1005 writel(0x00000001, &axi_qos->qosreqctr); 1006 writel(0x00002064, &axi_qos->qosthres0); 1007 writel(0x00002004, &axi_qos->qosthres1); 1008 writel(0x00000000, &axi_qos->qosthres2); 1009 writel(0x00000001, &axi_qos->qosqon); 1010 1011 /* QoS Register (Media-AXI) */ 1012 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXR_BASE; 1013 writel(0x00000002, &axi_qos->qosconf); 1014 writel(0x000020DC, &axi_qos->qosctset0); 1015 writel(0x00002096, &axi_qos->qosctset1); 1016 writel(0x00002030, &axi_qos->qosctset2); 1017 writel(0x00002030, &axi_qos->qosctset3); 1018 writel(0x00000020, &axi_qos->qosreqctr); 1019 writel(0x000020AA, &axi_qos->qosthres0); 1020 writel(0x00002032, &axi_qos->qosthres1); 1021 writel(0x00000001, &axi_qos->qosthres2); 1022 1023 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXW_BASE; 1024 writel(0x00000002, &axi_qos->qosconf); 1025 writel(0x000020DC, &axi_qos->qosctset0); 1026 writel(0x00002096, &axi_qos->qosctset1); 1027 writel(0x00002030, &axi_qos->qosctset2); 1028 writel(0x00002030, &axi_qos->qosctset3); 1029 writel(0x00000020, &axi_qos->qosreqctr); 1030 writel(0x000020AA, &axi_qos->qosthres0); 1031 writel(0x00002032, &axi_qos->qosthres1); 1032 writel(0x00000001, &axi_qos->qosthres2); 1033 1034 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPR_BASE; 1035 writel(0x00000001, &axi_qos->qosconf); 1036 writel(0x00002190, &axi_qos->qosctset0); 1037 writel(0x00000020, &axi_qos->qosreqctr); 1038 writel(0x00002064, &axi_qos->qosthres0); 1039 writel(0x00002004, &axi_qos->qosthres1); 1040 writel(0x00000001, &axi_qos->qosthres2); 1041 writel(0x00000001, &axi_qos->qosqon); 1042 1043 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPW_BASE; 1044 writel(0x00000001, &axi_qos->qosconf); 1045 writel(0x00002190, &axi_qos->qosctset0); 1046 writel(0x00000020, &axi_qos->qosreqctr); 1047 if (IS_R8A7791_ES2()) { 1048 writel(0x00000001, &axi_qos->qosthres0); 1049 writel(0x00000001, &axi_qos->qosthres1); 1050 } else { 1051 writel(0x00002064, &axi_qos->qosthres0); 1052 writel(0x00002004, &axi_qos->qosthres1); 1053 } 1054 writel(0x00000001, &axi_qos->qosthres2); 1055 writel(0x00000001, &axi_qos->qosqon); 1056 1057 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMR_BASE; 1058 writel(0x00000001, &axi_qos->qosconf); 1059 writel(0x00002190, &axi_qos->qosctset0); 1060 writel(0x00000020, &axi_qos->qosreqctr); 1061 writel(0x00002064, &axi_qos->qosthres0); 1062 writel(0x00002004, &axi_qos->qosthres1); 1063 writel(0x00000001, &axi_qos->qosthres2); 1064 writel(0x00000001, &axi_qos->qosqon); 1065 1066 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMW_BASE; 1067 writel(0x00000001, &axi_qos->qosconf); 1068 writel(0x00002190, &axi_qos->qosctset0); 1069 writel(0x00000020, &axi_qos->qosreqctr); 1070 writel(0x00002064, &axi_qos->qosthres0); 1071 writel(0x00002004, &axi_qos->qosthres1); 1072 writel(0x00000001, &axi_qos->qosthres2); 1073 writel(0x00000001, &axi_qos->qosqon); 1074 1075 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CR_BASE; 1076 writel(0x00000001, &axi_qos->qosconf); 1077 writel(0x00002190, &axi_qos->qosctset0); 1078 writel(0x00000020, &axi_qos->qosreqctr); 1079 writel(0x00002064, &axi_qos->qosthres0); 1080 writel(0x00002004, &axi_qos->qosthres1); 1081 writel(0x00000001, &axi_qos->qosthres2); 1082 writel(0x00000001, &axi_qos->qosqon); 1083 1084 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CW_BASE; 1085 writel(0x00000001, &axi_qos->qosconf); 1086 writel(0x00002190, &axi_qos->qosctset0); 1087 writel(0x00000020, &axi_qos->qosreqctr); 1088 if (IS_R8A7791_ES2()) { 1089 writel(0x00000001, &axi_qos->qosthres0); 1090 writel(0x00000001, &axi_qos->qosthres1); 1091 } else { 1092 writel(0x00002064, &axi_qos->qosthres0); 1093 writel(0x00002004, &axi_qos->qosthres1); 1094 } 1095 writel(0x00000001, &axi_qos->qosthres2); 1096 writel(0x00000001, &axi_qos->qosqon); 1097 1098 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CR_BASE; 1099 writel(0x00000001, &axi_qos->qosconf); 1100 writel(0x00002190, &axi_qos->qosctset0); 1101 writel(0x00000020, &axi_qos->qosreqctr); 1102 writel(0x00002064, &axi_qos->qosthres0); 1103 writel(0x00002004, &axi_qos->qosthres1); 1104 writel(0x00000001, &axi_qos->qosthres2); 1105 writel(0x00000001, &axi_qos->qosqon); 1106 1107 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CW_BASE; 1108 writel(0x00000001, &axi_qos->qosconf); 1109 writel(0x00002190, &axi_qos->qosctset0); 1110 writel(0x00000020, &axi_qos->qosreqctr); 1111 if (IS_R8A7791_ES2()) { 1112 writel(0x00000001, &axi_qos->qosthres0); 1113 writel(0x00000001, &axi_qos->qosthres1); 1114 } else { 1115 writel(0x00002064, &axi_qos->qosthres0); 1116 writel(0x00002004, &axi_qos->qosthres1); 1117 } 1118 writel(0x00000001, &axi_qos->qosthres2); 1119 writel(0x00000001, &axi_qos->qosqon); 1120 1121 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU1CR_BASE; 1122 writel(0x00000001, &axi_qos->qosconf); 1123 writel(0x00002190, &axi_qos->qosctset0); 1124 writel(0x00000020, &axi_qos->qosreqctr); 1125 writel(0x00002064, &axi_qos->qosthres0); 1126 writel(0x00002004, &axi_qos->qosthres1); 1127 writel(0x00000001, &axi_qos->qosthres2); 1128 writel(0x00000001, &axi_qos->qosqon); 1129 1130 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU1CW_BASE; 1131 writel(0x00000001, &axi_qos->qosconf); 1132 writel(0x00002190, &axi_qos->qosctset0); 1133 writel(0x00000020, &axi_qos->qosreqctr); 1134 if (IS_R8A7791_ES2()) { 1135 writel(0x00000001, &axi_qos->qosthres0); 1136 writel(0x00000001, &axi_qos->qosthres1); 1137 } else { 1138 writel(0x00002064, &axi_qos->qosthres0); 1139 writel(0x00002004, &axi_qos->qosthres1); 1140 } 1141 writel(0x00000001, &axi_qos->qosthres2); 1142 writel(0x00000001, &axi_qos->qosqon); 1143 1144 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VIN0W_BASE; 1145 writel(0x00000001, &axi_qos->qosconf); 1146 if (IS_R8A7791_ES2()) 1147 writel(0x00001FF0, &axi_qos->qosctset0); 1148 else 1149 writel(0x000020C8, &axi_qos->qosctset0); 1150 writel(0x00000020, &axi_qos->qosreqctr); 1151 writel(0x00002064, &axi_qos->qosthres0); 1152 writel(0x00002004, &axi_qos->qosthres1); 1153 if (IS_R8A7791_ES2()) 1154 writel(0x00002001, &axi_qos->qosthres2); 1155 else 1156 writel(0x00000001, &axi_qos->qosthres2); 1157 writel(0x00000001, &axi_qos->qosqon); 1158 1159 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0R_BASE; 1160 writel(0x00000001, &axi_qos->qosconf); 1161 writel(0x000020C8, &axi_qos->qosctset0); 1162 writel(0x00000020, &axi_qos->qosreqctr); 1163 writel(0x00002064, &axi_qos->qosthres0); 1164 writel(0x00002004, &axi_qos->qosthres1); 1165 writel(0x00000001, &axi_qos->qosthres2); 1166 writel(0x00000001, &axi_qos->qosqon); 1167 1168 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0W_BASE; 1169 writel(0x00000001, &axi_qos->qosconf); 1170 writel(0x000020C8, &axi_qos->qosctset0); 1171 writel(0x00000020, &axi_qos->qosreqctr); 1172 if (IS_R8A7791_ES2()) { 1173 writel(0x00000001, &axi_qos->qosthres0); 1174 writel(0x00000001, &axi_qos->qosthres1); 1175 } else { 1176 writel(0x00002064, &axi_qos->qosthres0); 1177 writel(0x00002004, &axi_qos->qosthres1); 1178 } 1179 writel(0x00000001, &axi_qos->qosthres2); 1180 writel(0x00000001, &axi_qos->qosqon); 1181 1182 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSR_BASE; 1183 writel(0x00000001, &axi_qos->qosconf); 1184 writel(0x000020C8, &axi_qos->qosctset0); 1185 writel(0x00000020, &axi_qos->qosreqctr); 1186 writel(0x00002064, &axi_qos->qosthres0); 1187 writel(0x00002004, &axi_qos->qosthres1); 1188 writel(0x00000001, &axi_qos->qosthres2); 1189 writel(0x00000001, &axi_qos->qosqon); 1190 1191 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSW_BASE; 1192 writel(0x00000001, &axi_qos->qosconf); 1193 writel(0x000020C8, &axi_qos->qosctset0); 1194 writel(0x00000020, &axi_qos->qosreqctr); 1195 writel(0x00002064, &axi_qos->qosthres0); 1196 writel(0x00002004, &axi_qos->qosthres1); 1197 writel(0x00000001, &axi_qos->qosthres2); 1198 writel(0x00000001, &axi_qos->qosqon); 1199 1200 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1R_BASE; 1201 writel(0x00000001, &axi_qos->qosconf); 1202 writel(0x000020C8, &axi_qos->qosctset0); 1203 writel(0x00000020, &axi_qos->qosreqctr); 1204 writel(0x00002064, &axi_qos->qosthres0); 1205 writel(0x00002004, &axi_qos->qosthres1); 1206 writel(0x00000001, &axi_qos->qosthres2); 1207 writel(0x00000001, &axi_qos->qosqon); 1208 1209 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1W_BASE; 1210 writel(0x00000001, &axi_qos->qosconf); 1211 writel(0x000020C8, &axi_qos->qosctset0); 1212 writel(0x00000020, &axi_qos->qosreqctr); 1213 if (IS_R8A7791_ES2()) { 1214 writel(0x00000001, &axi_qos->qosthres0); 1215 writel(0x00000001, &axi_qos->qosthres1); 1216 } else { 1217 writel(0x00002064, &axi_qos->qosthres0); 1218 writel(0x00002004, &axi_qos->qosthres1); 1219 } 1220 writel(0x00000001, &axi_qos->qosthres2); 1221 writel(0x00000001, &axi_qos->qosqon); 1222 1223 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP1R_BASE; 1224 writel(0x00000001, &axi_qos->qosconf); 1225 writel(0x000020C8, &axi_qos->qosctset0); 1226 writel(0x00000020, &axi_qos->qosreqctr); 1227 writel(0x00002064, &axi_qos->qosthres0); 1228 writel(0x00002004, &axi_qos->qosthres1); 1229 writel(0x00000001, &axi_qos->qosthres2); 1230 writel(0x00000001, &axi_qos->qosqon); 1231 1232 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP1W_BASE; 1233 writel(0x00000001, &axi_qos->qosconf); 1234 writel(0x000020C8, &axi_qos->qosctset0); 1235 writel(0x00000020, &axi_qos->qosreqctr); 1236 if (IS_R8A7791_ES2()) { 1237 writel(0x00000001, &axi_qos->qosthres0); 1238 writel(0x00000001, &axi_qos->qosthres1); 1239 } else { 1240 writel(0x00002064, &axi_qos->qosthres0); 1241 writel(0x00002004, &axi_qos->qosthres1); 1242 } 1243 writel(0x00000001, &axi_qos->qosthres2); 1244 writel(0x00000001, &axi_qos->qosqon); 1245 1246 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRR_BASE; 1247 writel(0x00000001, &axi_qos->qosconf); 1248 writel(0x000020C8, &axi_qos->qosctset0); 1249 writel(0x00000020, &axi_qos->qosreqctr); 1250 writel(0x00002064, &axi_qos->qosthres0); 1251 writel(0x00002004, &axi_qos->qosthres1); 1252 writel(0x00000001, &axi_qos->qosthres2); 1253 writel(0x00000001, &axi_qos->qosqon); 1254 1255 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRW_BASE; 1256 writel(0x00000001, &axi_qos->qosconf); 1257 writel(0x000020C8, &axi_qos->qosctset0); 1258 writel(0x00000020, &axi_qos->qosreqctr); 1259 writel(0x00002064, &axi_qos->qosthres0); 1260 writel(0x00002004, &axi_qos->qosthres1); 1261 writel(0x00000001, &axi_qos->qosthres2); 1262 writel(0x00000001, &axi_qos->qosqon); 1263 1264 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0R_BASE; 1265 if (IS_R8A7791_ES2()) 1266 writel(0x00000003, &axi_qos->qosconf); 1267 else 1268 writel(0x00000000, &axi_qos->qosconf); 1269 writel(0x000020C8, &axi_qos->qosctset0); 1270 writel(0x00002064, &axi_qos->qosthres0); 1271 writel(0x00002004, &axi_qos->qosthres1); 1272 writel(0x00000001, &axi_qos->qosthres2); 1273 writel(0x00000001, &axi_qos->qosqon); 1274 1275 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0W_BASE; 1276 if (IS_R8A7791_ES2()) 1277 writel(0x00000003, &axi_qos->qosconf); 1278 else 1279 writel(0x00000000, &axi_qos->qosconf); 1280 writel(0x000020C8, &axi_qos->qosctset0); 1281 writel(0x00002064, &axi_qos->qosthres0); 1282 writel(0x00002004, &axi_qos->qosthres1); 1283 writel(0x00000001, &axi_qos->qosthres2); 1284 writel(0x00000001, &axi_qos->qosqon); 1285 1286 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1R_BASE; 1287 if (IS_R8A7791_ES2()) 1288 writel(0x00000003, &axi_qos->qosconf); 1289 else 1290 writel(0x00000000, &axi_qos->qosconf); 1291 writel(0x000020C8, &axi_qos->qosctset0); 1292 writel(0x00002064, &axi_qos->qosthres0); 1293 writel(0x00002004, &axi_qos->qosthres1); 1294 writel(0x00000001, &axi_qos->qosthres2); 1295 writel(0x00000001, &axi_qos->qosqon); 1296 1297 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1W_BASE; 1298 if (IS_R8A7791_ES2()) 1299 writel(0x00000003, &axi_qos->qosconf); 1300 else 1301 writel(0x00000000, &axi_qos->qosconf); 1302 writel(0x000020C8, &axi_qos->qosctset0); 1303 writel(0x00002064, &axi_qos->qosthres0); 1304 writel(0x00002004, &axi_qos->qosthres1); 1305 writel(0x00000001, &axi_qos->qosthres2); 1306 writel(0x00000001, &axi_qos->qosqon); 1307 1308 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0R_BASE; 1309 if (IS_R8A7791_ES2()) 1310 writel(0x00000003, &axi_qos->qosconf); 1311 else 1312 writel(0x00000000, &axi_qos->qosconf); 1313 writel(0x00002063, &axi_qos->qosctset0); 1314 writel(0x00000001, &axi_qos->qosreqctr); 1315 writel(0x00002064, &axi_qos->qosthres0); 1316 writel(0x00002004, &axi_qos->qosthres1); 1317 writel(0x00000001, &axi_qos->qosthres2); 1318 writel(0x00000001, &axi_qos->qosqon); 1319 1320 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0W_BASE; 1321 if (IS_R8A7791_ES2()) 1322 writel(0x00000000, &axi_qos->qosconf); 1323 else 1324 writel(0x00000000, &axi_qos->qosconf); 1325 writel(0x00002063, &axi_qos->qosctset0); 1326 writel(0x00000001, &axi_qos->qosreqctr); 1327 writel(0x00002064, &axi_qos->qosthres0); 1328 writel(0x00002004, &axi_qos->qosthres1); 1329 writel(0x00000001, &axi_qos->qosthres2); 1330 writel(0x00000001, &axi_qos->qosqon); 1331 1332 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CR_BASE; 1333 writel(0x00000001, &axi_qos->qosconf); 1334 writel(0x00002073, &axi_qos->qosctset0); 1335 writel(0x00000020, &axi_qos->qosreqctr); 1336 writel(0x00002064, &axi_qos->qosthres0); 1337 writel(0x00002004, &axi_qos->qosthres1); 1338 writel(0x00000001, &axi_qos->qosthres2); 1339 writel(0x00000001, &axi_qos->qosqon); 1340 1341 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CW_BASE; 1342 writel(0x00000001, &axi_qos->qosconf); 1343 writel(0x00002073, &axi_qos->qosctset0); 1344 writel(0x00000020, &axi_qos->qosreqctr); 1345 if (IS_R8A7791_ES2()) { 1346 writel(0x00000001, &axi_qos->qosthres0); 1347 writel(0x00000001, &axi_qos->qosthres1); 1348 } else { 1349 writel(0x00002064, &axi_qos->qosthres0); 1350 writel(0x00002004, &axi_qos->qosthres1); 1351 } 1352 writel(0x00000001, &axi_qos->qosthres2); 1353 writel(0x00000001, &axi_qos->qosqon); 1354 1355 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VR_BASE; 1356 writel(0x00000001, &axi_qos->qosconf); 1357 writel(0x00002073, &axi_qos->qosctset0); 1358 writel(0x00000020, &axi_qos->qosreqctr); 1359 writel(0x00002064, &axi_qos->qosthres0); 1360 writel(0x00002004, &axi_qos->qosthres1); 1361 writel(0x00000001, &axi_qos->qosthres2); 1362 writel(0x00000001, &axi_qos->qosqon); 1363 1364 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VW_BASE; 1365 writel(0x00000001, &axi_qos->qosconf); 1366 writel(0x00002073, &axi_qos->qosctset0); 1367 writel(0x00000020, &axi_qos->qosreqctr); 1368 if (IS_R8A7791_ES2()) { 1369 writel(0x00000001, &axi_qos->qosthres0); 1370 writel(0x00000001, &axi_qos->qosthres1); 1371 } else { 1372 writel(0x00002064, &axi_qos->qosthres0); 1373 writel(0x00002004, &axi_qos->qosthres1); 1374 } 1375 writel(0x00000001, &axi_qos->qosthres2); 1376 writel(0x00000001, &axi_qos->qosqon); 1377 1378 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VPC0R_BASE; 1379 writel(0x00000001, &axi_qos->qosconf); 1380 writel(0x00002073, &axi_qos->qosctset0); 1381 writel(0x00000020, &axi_qos->qosreqctr); 1382 writel(0x00002064, &axi_qos->qosthres0); 1383 writel(0x00002004, &axi_qos->qosthres1); 1384 writel(0x00000001, &axi_qos->qosthres2); 1385 writel(0x00000001, &axi_qos->qosqon); 1386 } 1387 #else /* CONFIG_ARCH_RMOBILE_EXTRAM_BOOT */ 1388 void qos_init(void) 1389 { 1390 } 1391 #endif /* CONFIG_ARCH_RMOBILE_EXTRAM_BOOT */ 1392