1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * board/renesas/ebisu/ebisu.c 4 * This file is Ebisu board support. 5 * 6 * Copyright (C) 2018 Marek Vasut <marek.vasut+renesas@gmail.com> 7 */ 8 9 #include <common.h> 10 #include <malloc.h> 11 #include <netdev.h> 12 #include <dm.h> 13 #include <dm/platform_data/serial_sh.h> 14 #include <asm/processor.h> 15 #include <asm/mach-types.h> 16 #include <asm/io.h> 17 #include <linux/errno.h> 18 #include <asm/arch/sys_proto.h> 19 #include <asm/gpio.h> 20 #include <asm/arch/gpio.h> 21 #include <asm/arch/rmobile.h> 22 #include <asm/arch/rcar-mstp.h> 23 #include <asm/arch/sh_sdhi.h> 24 #include <i2c.h> 25 #include <mmc.h> 26 27 DECLARE_GLOBAL_DATA_PTR; 28 29 void s_init(void) 30 { 31 } 32 33 int board_early_init_f(void) 34 { 35 return 0; 36 } 37 38 int board_init(void) 39 { 40 /* adress of boot parameters */ 41 gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000; 42 43 return 0; 44 } 45 46 int dram_init(void) 47 { 48 if (fdtdec_setup_mem_size_base() != 0) 49 return -EINVAL; 50 51 return 0; 52 } 53 54 int dram_init_banksize(void) 55 { 56 fdtdec_setup_memory_banksize(); 57 58 return 0; 59 } 60 61 #define RST_BASE 0xE6160000 62 #define RST_CA57RESCNT (RST_BASE + 0x40) 63 #define RST_CA53RESCNT (RST_BASE + 0x44) 64 #define RST_RSTOUTCR (RST_BASE + 0x58) 65 #define RST_CA57_CODE 0xA5A5000F 66 #define RST_CA53_CODE 0x5A5A000F 67 68 void reset_cpu(ulong addr) 69 { 70 unsigned long midr, cputype; 71 72 asm volatile("mrs %0, midr_el1" : "=r" (midr)); 73 cputype = (midr >> 4) & 0xfff; 74 75 if (cputype == 0xd03) 76 writel(RST_CA53_CODE, RST_CA53RESCNT); 77 else if (cputype == 0xd07) 78 writel(RST_CA57_CODE, RST_CA57RESCNT); 79 else 80 hang(); 81 } 82