1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * board/renesas/ebisu/ebisu.c 4 * This file is Ebisu board support. 5 * 6 * Copyright (C) 2018 Marek Vasut <marek.vasut+renesas@gmail.com> 7 */ 8 9 #include <common.h> 10 #include <malloc.h> 11 #include <netdev.h> 12 #include <dm.h> 13 #include <dm/platform_data/serial_sh.h> 14 #include <asm/processor.h> 15 #include <asm/mach-types.h> 16 #include <asm/io.h> 17 #include <linux/errno.h> 18 #include <asm/arch/sys_proto.h> 19 #include <asm/gpio.h> 20 #include <asm/arch/gpio.h> 21 #include <asm/arch/rmobile.h> 22 #include <asm/arch/rcar-mstp.h> 23 #include <asm/arch/sh_sdhi.h> 24 #include <i2c.h> 25 #include <mmc.h> 26 27 DECLARE_GLOBAL_DATA_PTR; 28 29 void s_init(void) 30 { 31 } 32 33 #define TMU0_MSTP125 BIT(25) /* secure */ 34 35 int board_early_init_f(void) 36 { 37 /* TMU0 */ 38 mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); 39 40 return 0; 41 } 42 43 int board_init(void) 44 { 45 /* adress of boot parameters */ 46 gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000; 47 48 return 0; 49 } 50 51 int dram_init(void) 52 { 53 if (fdtdec_setup_mem_size_base() != 0) 54 return -EINVAL; 55 56 return 0; 57 } 58 59 int dram_init_banksize(void) 60 { 61 fdtdec_setup_memory_banksize(); 62 63 return 0; 64 } 65 66 #define RST_BASE 0xE6160000 67 #define RST_CA57RESCNT (RST_BASE + 0x40) 68 #define RST_CA53RESCNT (RST_BASE + 0x44) 69 #define RST_RSTOUTCR (RST_BASE + 0x58) 70 #define RST_CA57_CODE 0xA5A5000F 71 #define RST_CA53_CODE 0x5A5A000F 72 73 void reset_cpu(ulong addr) 74 { 75 unsigned long midr, cputype; 76 77 asm volatile("mrs %0, midr_el1" : "=r" (midr)); 78 cputype = (midr >> 4) & 0xfff; 79 80 if (cputype == 0xd03) 81 writel(RST_CA53_CODE, RST_CA53RESCNT); 82 else if (cputype == 0xd07) 83 writel(RST_CA57_CODE, RST_CA57RESCNT); 84 else 85 hang(); 86 } 87