1 /* 2 * board/renesas/ebisu/ebisu.c 3 * This file is Ebisu board support. 4 * 5 * Copyright (C) 2018 Marek Vasut <marek.vasut+renesas@gmail.com> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #include <common.h> 11 #include <malloc.h> 12 #include <netdev.h> 13 #include <dm.h> 14 #include <dm/platform_data/serial_sh.h> 15 #include <asm/processor.h> 16 #include <asm/mach-types.h> 17 #include <asm/io.h> 18 #include <linux/errno.h> 19 #include <asm/arch/sys_proto.h> 20 #include <asm/gpio.h> 21 #include <asm/arch/gpio.h> 22 #include <asm/arch/rmobile.h> 23 #include <asm/arch/rcar-mstp.h> 24 #include <asm/arch/sh_sdhi.h> 25 #include <i2c.h> 26 #include <mmc.h> 27 28 DECLARE_GLOBAL_DATA_PTR; 29 30 void s_init(void) 31 { 32 } 33 34 #define TMU0_MSTP125 BIT(25) /* secure */ 35 36 int board_early_init_f(void) 37 { 38 /* TMU0 */ 39 mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); 40 41 return 0; 42 } 43 44 int board_init(void) 45 { 46 /* adress of boot parameters */ 47 gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000; 48 49 return 0; 50 } 51 52 int dram_init(void) 53 { 54 if (fdtdec_setup_memory_size() != 0) 55 return -EINVAL; 56 57 return 0; 58 } 59 60 int dram_init_banksize(void) 61 { 62 fdtdec_setup_memory_banksize(); 63 64 return 0; 65 } 66 67 #define RST_BASE 0xE6160000 68 #define RST_CA57RESCNT (RST_BASE + 0x40) 69 #define RST_CA53RESCNT (RST_BASE + 0x44) 70 #define RST_RSTOUTCR (RST_BASE + 0x58) 71 #define RST_CA57_CODE 0xA5A5000F 72 #define RST_CA53_CODE 0x5A5A000F 73 74 void reset_cpu(ulong addr) 75 { 76 unsigned long midr, cputype; 77 78 asm volatile("mrs %0, midr_el1" : "=r" (midr)); 79 cputype = (midr >> 4) & 0xfff; 80 81 if (cputype == 0xd03) 82 writel(RST_CA53_CODE, RST_CA53RESCNT); 83 else if (cputype == 0xd07) 84 writel(RST_CA57_CODE, RST_CA57RESCNT); 85 else 86 hang(); 87 } 88