1/*
2 * Copyright (C) 2008 Renesas Solutions Corp.
3 * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
4 *
5 * board/ap325rxa/lowlevel_init.S
6 *
7 * SPDX-License-Identifier:	GPL-2.0+
8 */
9
10#include <config.h>
11#include <version.h>
12#include <asm/processor.h>
13#include <asm/macro.h>
14
15/*
16 * Board specific low level init code, called _very_ early in the
17 * startup sequence. Relocation to SDRAM has not happened yet, no
18 * stack is available, bss section has not been initialised, etc.
19 *
20 * (Note: As no stack is available, no subroutines can be called...).
21 */
22
23	.global	lowlevel_init
24
25	.text
26	.align	2
27
28lowlevel_init:
29	write16	DRVCRA_A, DRVCRA_D
30
31	write16	DRVCRB_A, DRVCRB_D
32
33	write16	RWTCSR_A, RWTCSR_D1
34
35	write16	RWTCNT_A, RWTCNT_D
36
37	write16	RWTCSR_A, RWTCSR_D2
38
39	write32	FRQCR_A, FRQCR_D
40
41	write32	CMNCR_A, CMNCR_D
42
43	write32	CS0BCR_A, CS0BCR_D
44
45	write32	CS4BCR_A, CS4BCR_D
46
47	write32	CS5ABCR_A, CS5ABCR_D
48
49	write32	CS5BBCR_A, CS5BBCR_D
50
51	write32	CS6ABCR_A, CS6ABCR_D
52
53	write32	CS6BBCR_A, CS6BBCR_D
54
55	write32	CS0WCR_A, CS0WCR_D
56
57	write32	CS4WCR_A, CS4WCR_D
58
59	write32	CS5AWCR_A, CS5AWCR_D
60
61	write32	CS5BWCR_A, CS5BWCR_D
62
63	write32	CS6AWCR_A, CS6AWCR_D
64
65	write32	CS6BWCR_A, CS6BWCR_D
66
67	write32	SBSC_SDCR_A, SBSC_SDCR_D1
68
69	write32	SBSC_SDWCR_A, SBSC_SDWCR_D
70
71	write32	SBSC_SDPCR_A, SBSC_SDPCR_D
72
73	write32	SBSC_RTCSR_A, SBSC_RTCSR_D
74
75	write32	SBSC_RTCNT_A, SBSC_RTCNT_D
76
77	write32	SBSC_RTCOR_A, SBSC_RTCOR_D
78
79	write8	SBSC_SDMR3_A1, SBSC_SDMR3_D
80
81	write8	SBSC_SDMR3_A2, SBSC_SDMR3_D
82
83	mov.l	SLEEP_CNT, r1
842:	tst	r1, r1
85	nop
86	bf/s	2b
87	dt	r1
88
89	write8	SBSC_SDMR3_A3, SBSC_SDMR3_D
90
91	write32	SBSC_SDCR_A, SBSC_SDCR_D2
92
93	write32	CCR_A, CCR_D
94
95	! BL bit off (init = ON) (?!?)
96
97	stc	sr, r0				! BL bit off(init=ON)
98	mov.l	SR_MASK_D, r1
99	and	r1, r0
100	ldc	r0, sr
101
102	rts
103	 mov	#0, r0
104
105	.align	2
106
107DRVCRA_A:	.long	DRVCRA
108DRVCRB_A:	.long	DRVCRB
109DRVCRA_D:	.word	0x4555
110DRVCRB_D:	.word	0x0005
111
112RWTCSR_A:	.long	RWTCSR
113RWTCNT_A:	.long	RWTCNT
114FRQCR_A:	.long	FRQCR
115RWTCSR_D1:	.word	0xa507
116RWTCSR_D2:	.word	0xa504
117RWTCNT_D:	.word	0x5a00
118.align 2
119FRQCR_D:	.long	0x0b04474a
120
121SBSC_SDCR_A:	.long	SBSC_SDCR
122SBSC_SDWCR_A:	.long	SBSC_SDWCR
123SBSC_SDPCR_A:	.long	SBSC_SDPCR
124SBSC_RTCSR_A:	.long	SBSC_RTCSR
125SBSC_RTCNT_A:	.long	SBSC_RTCNT
126SBSC_RTCOR_A:	.long	SBSC_RTCOR
127SBSC_SDMR3_A1:	.long	0xfe510000
128SBSC_SDMR3_A2:	.long	0xfe500242
129SBSC_SDMR3_A3:	.long	0xfe5c0042
130
131SBSC_SDCR_D1:	.long	0x92810112
132SBSC_SDCR_D2:	.long	0x92810912
133SBSC_SDWCR_D:	.long	0x05162482
134SBSC_SDPCR_D:	.long	0x00300087
135SBSC_RTCSR_D:	.long	0xa55a0212
136SBSC_RTCNT_D:	.long	0xa55a0000
137SBSC_RTCOR_D:	.long	0xa55a0040
138SBSC_SDMR3_D:	.long	0x00
139
140CMNCR_A:	.long	CMNCR
141CS0BCR_A:	.long	CS0BCR
142CS4BCR_A:	.long	CS4BCR
143CS5ABCR_A:	.long	CS5ABCR
144CS5BBCR_A:	.long	CS5BBCR
145CS6ABCR_A:	.long	CS6ABCR
146CS6BBCR_A:	.long	CS6BBCR
147CS0WCR_A:	.long	CS0WCR
148CS4WCR_A:	.long	CS4WCR
149CS5AWCR_A:	.long	CS5AWCR
150CS5BWCR_A:	.long	CS5BWCR
151CS6AWCR_A:	.long	CS6AWCR
152CS6BWCR_A:	.long	CS6BWCR
153
154CMNCR_D:	.long	0x00000013
155CS0BCR_D:	.long	0x24920400
156CS4BCR_D:	.long	0x24920400
157CS5ABCR_D:	.long	0x24920400
158CS5BBCR_D:	.long	0x7fff0600
159CS6ABCR_D:	.long	0x24920400
160CS6BBCR_D:	.long	0x24920600
161CS0WCR_D:	.long	0x00000480
162CS4WCR_D:	.long	0x00000480
163CS5AWCR_D:	.long	0x00000380
164CS5BWCR_D:	.long	0x00000080
165CS6AWCR_D:	.long	0x00000300
166CS6BWCR_D:	.long	0x00000540
167
168CCR_A:		.long	0xff00001c
169CCR_D:		.long	0x0000090d
170
171SLEEP_CNT:	.long	0x00000800
172SR_MASK_D:	.long	0xEFFFFF0F
173