1/*
2 * Copyright (C) 2008 Renesas Solutions Corp.
3 * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
4 *
5 * board/ap325rxa/lowlevel_init.S
6 *
7 * SPDX-License-Identifier:	GPL-2.0+
8 */
9
10#include <config.h>
11#include <asm/processor.h>
12#include <asm/macro.h>
13
14/*
15 * Board specific low level init code, called _very_ early in the
16 * startup sequence. Relocation to SDRAM has not happened yet, no
17 * stack is available, bss section has not been initialised, etc.
18 *
19 * (Note: As no stack is available, no subroutines can be called...).
20 */
21
22	.global	lowlevel_init
23
24	.text
25	.align	2
26
27lowlevel_init:
28	write16	DRVCRA_A, DRVCRA_D
29
30	write16	DRVCRB_A, DRVCRB_D
31
32	write16	RWTCSR_A, RWTCSR_D1
33
34	write16	RWTCNT_A, RWTCNT_D
35
36	write16	RWTCSR_A, RWTCSR_D2
37
38	write32	FRQCR_A, FRQCR_D
39
40	write32	CMNCR_A, CMNCR_D
41
42	write32	CS0BCR_A, CS0BCR_D
43
44	write32	CS4BCR_A, CS4BCR_D
45
46	write32	CS5ABCR_A, CS5ABCR_D
47
48	write32	CS5BBCR_A, CS5BBCR_D
49
50	write32	CS6ABCR_A, CS6ABCR_D
51
52	write32	CS6BBCR_A, CS6BBCR_D
53
54	write32	CS0WCR_A, CS0WCR_D
55
56	write32	CS4WCR_A, CS4WCR_D
57
58	write32	CS5AWCR_A, CS5AWCR_D
59
60	write32	CS5BWCR_A, CS5BWCR_D
61
62	write32	CS6AWCR_A, CS6AWCR_D
63
64	write32	CS6BWCR_A, CS6BWCR_D
65
66	write32	SBSC_SDCR_A, SBSC_SDCR_D1
67
68	write32	SBSC_SDWCR_A, SBSC_SDWCR_D
69
70	write32	SBSC_SDPCR_A, SBSC_SDPCR_D
71
72	write32	SBSC_RTCSR_A, SBSC_RTCSR_D
73
74	write32	SBSC_RTCNT_A, SBSC_RTCNT_D
75
76	write32	SBSC_RTCOR_A, SBSC_RTCOR_D
77
78	write8	SBSC_SDMR3_A1, SBSC_SDMR3_D
79
80	write8	SBSC_SDMR3_A2, SBSC_SDMR3_D
81
82	mov.l	SLEEP_CNT, r1
832:	tst	r1, r1
84	nop
85	bf/s	2b
86	dt	r1
87
88	write8	SBSC_SDMR3_A3, SBSC_SDMR3_D
89
90	write32	SBSC_SDCR_A, SBSC_SDCR_D2
91
92	write32	CCR_A, CCR_D
93
94	! BL bit off (init = ON) (?!?)
95
96	stc	sr, r0				! BL bit off(init=ON)
97	mov.l	SR_MASK_D, r1
98	and	r1, r0
99	ldc	r0, sr
100
101	rts
102	 mov	#0, r0
103
104	.align	2
105
106DRVCRA_A:	.long	DRVCRA
107DRVCRB_A:	.long	DRVCRB
108DRVCRA_D:	.word	0x4555
109DRVCRB_D:	.word	0x0005
110
111RWTCSR_A:	.long	RWTCSR
112RWTCNT_A:	.long	RWTCNT
113FRQCR_A:	.long	FRQCR
114RWTCSR_D1:	.word	0xa507
115RWTCSR_D2:	.word	0xa504
116RWTCNT_D:	.word	0x5a00
117.align 2
118FRQCR_D:	.long	0x0b04474a
119
120SBSC_SDCR_A:	.long	SBSC_SDCR
121SBSC_SDWCR_A:	.long	SBSC_SDWCR
122SBSC_SDPCR_A:	.long	SBSC_SDPCR
123SBSC_RTCSR_A:	.long	SBSC_RTCSR
124SBSC_RTCNT_A:	.long	SBSC_RTCNT
125SBSC_RTCOR_A:	.long	SBSC_RTCOR
126SBSC_SDMR3_A1:	.long	0xfe510000
127SBSC_SDMR3_A2:	.long	0xfe500242
128SBSC_SDMR3_A3:	.long	0xfe5c0042
129
130SBSC_SDCR_D1:	.long	0x92810112
131SBSC_SDCR_D2:	.long	0x92810912
132SBSC_SDWCR_D:	.long	0x05162482
133SBSC_SDPCR_D:	.long	0x00300087
134SBSC_RTCSR_D:	.long	0xa55a0212
135SBSC_RTCNT_D:	.long	0xa55a0000
136SBSC_RTCOR_D:	.long	0xa55a0040
137SBSC_SDMR3_D:	.long	0x00
138
139CMNCR_A:	.long	CMNCR
140CS0BCR_A:	.long	CS0BCR
141CS4BCR_A:	.long	CS4BCR
142CS5ABCR_A:	.long	CS5ABCR
143CS5BBCR_A:	.long	CS5BBCR
144CS6ABCR_A:	.long	CS6ABCR
145CS6BBCR_A:	.long	CS6BBCR
146CS0WCR_A:	.long	CS0WCR
147CS4WCR_A:	.long	CS4WCR
148CS5AWCR_A:	.long	CS5AWCR
149CS5BWCR_A:	.long	CS5BWCR
150CS6AWCR_A:	.long	CS6AWCR
151CS6BWCR_A:	.long	CS6BWCR
152
153CMNCR_D:	.long	0x00000013
154CS0BCR_D:	.long	0x24920400
155CS4BCR_D:	.long	0x24920400
156CS5ABCR_D:	.long	0x24920400
157CS5BBCR_D:	.long	0x7fff0600
158CS6ABCR_D:	.long	0x24920400
159CS6BBCR_D:	.long	0x24920600
160CS0WCR_D:	.long	0x00000480
161CS4WCR_D:	.long	0x00000480
162CS5AWCR_D:	.long	0x00000380
163CS5BWCR_D:	.long	0x00000080
164CS6AWCR_D:	.long	0x00000300
165CS6BWCR_D:	.long	0x00000540
166
167CCR_A:		.long	0xff00001c
168CCR_D:		.long	0x0000090d
169
170SLEEP_CNT:	.long	0x00000800
171SR_MASK_D:	.long	0xEFFFFF0F
172