1*d275c40cSAlbert ARIBAUD \(3ADEV\) /* 2*d275c40cSAlbert ARIBAUD \(3ADEV\) * Copyright (C) DENX 3*d275c40cSAlbert ARIBAUD \(3ADEV\) * Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr> 4*d275c40cSAlbert ARIBAUD \(3ADEV\) * 5*d275c40cSAlbert ARIBAUD \(3ADEV\) * Original code (C) Copyright 2010 6*d275c40cSAlbert ARIBAUD \(3ADEV\) * Robert Aigner (ra@spiid.net) 7*d275c40cSAlbert ARIBAUD \(3ADEV\) * 8*d275c40cSAlbert ARIBAUD \(3ADEV\) * SPDX-License-Identifier: GPL-2.0+ 9*d275c40cSAlbert ARIBAUD \(3ADEV\) */ 10*d275c40cSAlbert ARIBAUD \(3ADEV\) #ifndef _EVM_H_ 11*d275c40cSAlbert ARIBAUD \(3ADEV\) #define _EVM_H_ 12*d275c40cSAlbert ARIBAUD \(3ADEV\) 13*d275c40cSAlbert ARIBAUD \(3ADEV\) 14*d275c40cSAlbert ARIBAUD \(3ADEV\) const omap3_sysinfo sysinfo = { 15*d275c40cSAlbert ARIBAUD \(3ADEV\) DDR_DISCRETE, 16*d275c40cSAlbert ARIBAUD \(3ADEV\) "OMAP3 Cairo board", 17*d275c40cSAlbert ARIBAUD \(3ADEV\) "NAND", 18*d275c40cSAlbert ARIBAUD \(3ADEV\) }; 19*d275c40cSAlbert ARIBAUD \(3ADEV\) 20*d275c40cSAlbert ARIBAUD \(3ADEV\) /* 21*d275c40cSAlbert ARIBAUD \(3ADEV\) * OMAP3 Cairo handheld hardware revision 22*d275c40cSAlbert ARIBAUD \(3ADEV\) */ 23*d275c40cSAlbert ARIBAUD \(3ADEV\) enum { 24*d275c40cSAlbert ARIBAUD \(3ADEV\) OMAP3_CAIRO_BOARD_GEN_1 = 0, /* Cairo handheld V01 */ 25*d275c40cSAlbert ARIBAUD \(3ADEV\) OMAP3_CAIRO_BOARD_GEN_2, 26*d275c40cSAlbert ARIBAUD \(3ADEV\) }; 27*d275c40cSAlbert ARIBAUD \(3ADEV\) 28*d275c40cSAlbert ARIBAUD \(3ADEV\) #define MUX_CAIRO() \ 29*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPIO112, (IEN | PTD | EN | M7)) \ 30*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPIO113, (IEN | PTD | EN | M7)) \ 31*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPIO114, (IEN | PTD | EN | M7)) \ 32*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPIO115, (IEN | PTD | EN | M7)) \ 33*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPIO126, (IEN | PTD | EN | M7)) \ 34*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPIO127, (IEN | PTD | EN | M7)) \ 35*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPIO128, (IEN | PTD | EN | M7)) \ 36*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPIO129, (IEN | PTD | EN | M7)) \ 37*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_CAM_D0, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \ 38*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_CAM_D1, (IEN | DIS | SB_HIZ | M4)) \ 39*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_CAM_D2, (IEN | DIS | SB_HIZ | M7)) \ 40*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_CAM_D3, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \ 41*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_CAM_D4, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \ 42*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_CAM_D5, (IEN | PTD | EN | M7)) \ 43*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_CAM_D6, (IEN | PTD | EN | SB_HIZ | SB_PD | M7)) \ 44*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_CAM_D7, (IEN | PTD | EN | M7)) \ 45*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_CAM_D8, (IEN | DIS | SB_HIZ | M7)) \ 46*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_CAM_D9, (IEN | DIS | SB_HIZ | M4)) \ 47*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_CAM_D10, (IEN | PTD | EN | M7)) \ 48*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_CAM_D11, (IEN | PTD | EN | SB_LOW | SB_PD | M4)) \ 49*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_CAM_FLD, (IEN | DIS | SB_HIZ | M4)) \ 50*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_CAM_HS, (IEN | PTD | EN | SB_LOW | SB_PD | M4)) \ 51*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_CAM_PCLK, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \ 52*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_CAM_STROBE, (IDIS | PTU | EN | SB_HI | SB_PU | M4)) \ 53*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_CAM_VS, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \ 54*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_CAM_WEN, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \ 55*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_CAM_XCLKA, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \ 56*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_CAM_XCLKB, (IEN | DIS | SB_HIZ | SB_PD | M7)) \ 57*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_DSS_ACBIAS, (IDIS | PTD | EN | SB_HIZ | SB_PD | M0)) \ 58*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_DSS_DATA0, (IDIS | PTD | EN | M0)) \ 59*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_DSS_DATA1, (IDIS | PTD | EN | M0)) \ 60*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_DSS_DATA2, (IDIS | PTD | EN | M0)) \ 61*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_DSS_DATA3, (IDIS | PTD | EN | M0)) \ 62*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_DSS_DATA4, (IDIS | PTD | EN | M0)) \ 63*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_DSS_DATA5, (IDIS | PTD | EN | M0)) \ 64*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_DSS_DATA6, (IDIS | PTD | EN | M0)) \ 65*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_DSS_DATA7, (IDIS | PTD | EN | M0)) \ 66*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_DSS_DATA8, (IDIS | PTD | EN | M0)) \ 67*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_DSS_DATA9, (IDIS | PTD | EN | M0)) \ 68*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_DSS_DATA10, (IDIS | PTD | EN | M0)) \ 69*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_DSS_DATA11, (IDIS | PTD | EN | M0)) \ 70*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_DSS_DATA12, (IDIS | PTD | EN | M0)) \ 71*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_DSS_DATA13, (IDIS | PTD | EN | M0)) \ 72*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_DSS_DATA14, (IDIS | PTD | EN | M0)) \ 73*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_DSS_DATA15, (IDIS | PTD | EN | M0)) \ 74*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_DSS_DATA16, (IDIS | PTD | EN | M0)) \ 75*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_DSS_DATA17, (IDIS | PTD | EN | M0)) \ 76*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_DSS_DATA18, (IDIS | PTD | EN | M0)) \ 77*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_DSS_DATA19, (IDIS | PTD | EN | M0)) \ 78*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_DSS_DATA20, (IDIS | PTU | EN | M0)) \ 79*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_DSS_DATA21, (IDIS | PTD | EN | M0)) \ 80*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_DSS_DATA22, (IDIS | PTD | EN | M0)) \ 81*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_DSS_DATA23, (IDIS | PTD | EN | M0)) \ 82*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_DSS_HSYNC, (IDIS | PTU | EN | M0)) \ 83*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_DSS_PCLK, (IDIS | PTU | EN | M0)) \ 84*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_DSS_VSYNC, (IDIS | PTU | EN | M0)) \ 85*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_ETK_CLK_ES2, (IDIS | PTU | EN | M3)) \ 86*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_ETK_CTL_ES2, (IDIS | PTU | EN | M3)) \ 87*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_ETK_D0_ES2, (IEN | PTU | EN | M3)) \ 88*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_ETK_D1_ES2, (IEN | PTU | EN | M3)) \ 89*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_ETK_D2_ES2, (IEN | PTU | EN | M3)) \ 90*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_ETK_D3_ES2, (IEN | PTU | EN | M3)) \ 91*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_ETK_D4_ES2, (IEN | PTD | EN | M3)) \ 92*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_ETK_D5_ES2, (IEN | PTD | EN | M3)) \ 93*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_ETK_D6_ES2, (IEN | PTD | EN | M3)) \ 94*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_ETK_D7_ES2, (IEN | PTD | EN | M3)) \ 95*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_ETK_D8_ES2, (IEN | PTD | EN | M3)) \ 96*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_ETK_D9_ES2, (IEN | PTD | EN | M3)) \ 97*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_ETK_D10_ES2, (IDIS | PTD | EN | M3)) \ 98*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_ETK_D11_ES2, (IDIS | PTD | EN | M3)) \ 99*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_ETK_D12_ES2, (IEN | PTD | EN | M3)) \ 100*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_ETK_D13_ES2, (IEN | PTD | EN | M3)) \ 101*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_ETK_D14_ES2, (IEN | PTD | EN | M3)) \ 102*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_ETK_D15_ES2, (IEN | PTD | EN | M3)) \ 103*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_A1, (IEN | PTD | EN | M7)) \ 104*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_A2, (IEN | PTD | EN | M7)) \ 105*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_A3, (IEN | PTD | EN | M7)) \ 106*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_A4, (IEN | PTD | EN | M7)) \ 107*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_A5, (IEN | PTD | EN | M7)) \ 108*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_A6, (IEN | PTU | EN | M7)) \ 109*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_A7, (IEN | PTU | EN | M7)) \ 110*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_A8, (IEN | PTU | EN | M7)) \ 111*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_A9, (IEN | PTU | EN | M7)) \ 112*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_A10, (IEN | PTU | EN | M7)) \ 113*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_A11, (IEN | PTD | EN | M7)) \ 114*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_CLK, (IEN | DIS | M7)) \ 115*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_D0, (IEN | PTU | EN | M0)) \ 116*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_D1, (IEN | PTU | EN | M0)) \ 117*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_D2, (IEN | PTU | EN | M0)) \ 118*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_D3, (IEN | PTU | EN | M0)) \ 119*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_D4, (IEN | PTU | EN | M0)) \ 120*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_D5, (IEN | PTU | EN | M0)) \ 121*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_D6, (IEN | PTU | EN | M0)) \ 122*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_D7, (IEN | PTU | EN | M0)) \ 123*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_D8, (IEN | PTU | EN | M7)) \ 124*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_D9, (IEN | PTU | EN | M7)) \ 125*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_D10, (IEN | PTU | EN | M7)) \ 126*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_D11, (IEN | PTU | EN | M7)) \ 127*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_D12, (IEN | PTU | EN | M7)) \ 128*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_D13, (IEN | PTU | EN | M7)) \ 129*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_D14, (IEN | PTU | EN | M7)) \ 130*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_D15, (IEN | PTU | EN | M7)) \ 131*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_NADV_ALE, (IDIS | DIS | M0)) \ 132*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_NBE0_CLE, (IDIS | DIS | M0)) \ 133*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_NBE1, (IEN | PTD | EN | M7)) \ 134*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_NCS0, (IDIS | DIS | SB_HIZ | SB_PD | M0)) \ 135*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_NCS1, (IEN | DIS | M7)) \ 136*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_NCS2, (IEN | PTU | EN | M7)) \ 137*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_NCS3, (IEN | PTU | EN | M7)) \ 138*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_NCS4, (IDIS | DIS | SB_HIZ | SB_PD | M3)) \ 139*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_NCS5, (IDIS | DIS | SB_HIZ | SB_PD | M3)) \ 140*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_NCS6, (IDIS | DIS | SB_HIZ | SB_PD | M3)) \ 141*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_NCS7, (IDIS | DIS | SB_HIZ | SB_PD | M3)) \ 142*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_NOE, (IDIS | DIS | M0)) \ 143*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_NWE, (IDIS | DIS | M0)) \ 144*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_NWP, (IDIS | DIS | SB_HIZ | SB_PU | M0)) \ 145*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_WAIT0, (IEN | DIS | SB_HIZ | M0)) \ 146*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_WAIT1, (IEN | PTU | EN | M7)) \ 147*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_WAIT2, (IEN | PTU | EN | M7)) \ 148*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_GPMC_WAIT3, (IEN | PTU | EN | M7)) \ 149*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_HDQ_SIO, (IEN | DIS | SB_HIZ | M4)) \ 150*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_HSUSB0_CLK, (IEN | PTD | EN | M0)) \ 151*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_HSUSB0_DATA0, (IEN | PTD | EN | M0)) \ 152*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_HSUSB0_DATA1, (IEN | PTD | EN | M0)) \ 153*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_HSUSB0_DATA2, (IEN | PTD | EN | M0)) \ 154*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_HSUSB0_DATA3, (IEN | PTD | EN | M0)) \ 155*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_HSUSB0_DATA4, (IEN | PTD | EN | M0)) \ 156*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_HSUSB0_DATA5, (IEN | PTD | EN | M0)) \ 157*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_HSUSB0_DATA6, (IEN | PTD | EN | M0)) \ 158*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_HSUSB0_DATA7, (IEN | PTD | EN | M0)) \ 159*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_HSUSB0_DIR, (IEN | PTD | EN | M0)) \ 160*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_HSUSB0_NXT, (IEN | PTD | EN | M0)) \ 161*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_HSUSB0_STP, (IDIS | PTU | EN | M0)) \ 162*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_I2C1_SCL, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ 163*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_I2C1_SDA, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ 164*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_I2C2_SCL, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ 165*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_I2C2_SDA, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ 166*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_I2C3_SCL, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \ 167*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_I2C3_SDA, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \ 168*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_I2C4_SCL, (IEN | PTU | EN | M7)) \ 169*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_I2C4_SDA, (IEN | PTU | EN | M7)) \ 170*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_JTAG_EMU0, (IEN | PTU | EN | M0)) \ 171*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_JTAG_EMU1, (IEN | PTU | EN | M0)) \ 172*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_JTAG_NTRST, (IEN | PTD | EN | M0)) \ 173*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_JTAG_RTCK, (IDIS | DIS | M0)) \ 174*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_JTAG_TCK, (IEN | PTD | EN | M0)) \ 175*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_JTAG_TDI, (IEN | PTU | EN | M0)) \ 176*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_JTAG_TDO, (IDIS | DIS | M0)) \ 177*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_JTAG_TMS, (IEN | PTU | EN | M0)) \ 178*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MCBSP_CLKS, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \ 179*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MCBSP1_CLKR, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \ 180*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MCBSP1_CLKX, (IEN | DIS | SB_HIZ | M4)) \ 181*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MCBSP1_DR, (IEN | DIS | SB_HIZ | M4)) \ 182*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MCBSP1_DX, (IEN | DIS | SB_HIZ | SB_PD | M7)) \ 183*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MCBSP1_FSR, (IEN | PTD | EN | M7)) \ 184*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MCBSP1_FSX, (IEN | DIS | SB_HIZ | M4)) \ 185*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MCBSP2_CLKX, (IEN | PTD | EN | M7)) \ 186*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MCBSP2_DR, (IEN | PTD | EN | M7)) \ 187*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MCBSP2_DX, (IEN | PTD | EN | M7)) \ 188*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MCBSP2_FSX, (IEN | PTD | EN | M7)) \ 189*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MCBSP3_CLKX, (IDIS | DIS | SB_HIZ | SB_PU | M1)) \ 190*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MCBSP3_DR, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \ 191*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MCBSP3_DX, (IEN | PTD | EN | M7)) \ 192*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MCBSP3_FSX, (IEN | PTU | EN | SB_HIZ | SB_PU | M1)) \ 193*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MCBSP4_CLKX, (IEN | PTD | EN | M7)) \ 194*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MCBSP4_DR, (IEN | PTD | EN | M7)) \ 195*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MCBSP4_DX, (IEN | PTD | EN | M7)) \ 196*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MCBSP4_FSX, (IEN | PTD | EN | M7)) \ 197*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MCSPI1_CLK, (IEN | PTD | EN | M0)) \ 198*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MCSPI1_CS0, (IEN | PTU | EN | SB_HIZ | SB_PD | M0)) \ 199*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MCSPI1_CS1, (IEN | PTU | EN | M7)) \ 200*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MCSPI1_CS2, (IEN | PTU | EN | M7)) \ 201*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MCSPI1_CS3, (IEN | PTU | EN | M3)) \ 202*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MCSPI1_SIMO, (IEN | PTD | EN | M0)) \ 203*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MCSPI1_SOMI, (IEN | PTD | EN | M0)) \ 204*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MCSPI2_CLK, (IEN | PTD | EN | M3)) \ 205*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MCSPI2_CS0, (IEN | PTU | EN | M3)) \ 206*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MCSPI2_CS1, (IEN | PTD | EN | M3)) \ 207*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MCSPI2_SIMO, (IEN | PTD | EN | M3)) \ 208*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MCSPI2_SOMI, (IEN | PTD | EN | M3)) \ 209*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MMC1_CLK, (IDIS | PTU | EN | SB_HIZ | SB_PU | M0)) \ 210*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MMC1_CMD, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ 211*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MMC1_DAT0, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ 212*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MMC1_DAT1, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ 213*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MMC1_DAT2, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ 214*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MMC1_DAT3, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ 215*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MMC2_CLK, (IEN | PTD | EN | SB_HIZ | SB_PU | M0)) \ 216*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MMC2_CMD, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ 217*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MMC2_DAT0, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ 218*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MMC2_DAT1, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ 219*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MMC2_DAT2, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ 220*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MMC2_DAT3, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ 221*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MMC2_DAT4, (IDIS | DIS | SB_HIZ | M0)) \ 222*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MMC2_DAT5, (IDIS | DIS | SB_HIZ | M0)) \ 223*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MMC2_DAT6, (IDIS | DIS | SB_HIZ | M0)) \ 224*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_MMC2_DAT7, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ 225*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_A0, (IDIS | DIS | M0)) \ 226*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_A1, (IDIS | DIS | M0)) \ 227*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_A2, (IDIS | DIS | M0)) \ 228*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_A3, (IDIS | DIS | M0)) \ 229*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_A4, (IDIS | DIS | M0)) \ 230*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_A5, (IDIS | DIS | M0)) \ 231*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_A6, (IDIS | DIS | M0)) \ 232*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_A7, (IDIS | DIS | M0)) \ 233*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_A8, (IDIS | DIS | M0)) \ 234*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_A9, (IDIS | DIS | M0)) \ 235*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_A10, (IDIS | DIS | M0)) \ 236*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_A11, (IDIS | DIS | M0)) \ 237*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_A12, (IDIS | DIS | M0)) \ 238*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_A13, (IDIS | DIS | M0)) \ 239*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_A14, (IDIS | DIS | M0)) \ 240*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_BA0, (IDIS | DIS | M0)) \ 241*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_BA1, (IDIS | DIS | M0)) \ 242*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_CKE0, (IDIS | DIS | M0)) \ 243*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_CKE1, (IDIS | DIS | M7)) \ 244*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_CLK, (IEN | DIS | M0)) \ 245*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_D0, (IEN | DIS | M0)) \ 246*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_D1, (IEN | DIS | M0)) \ 247*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_D2, (IEN | DIS | M0)) \ 248*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_D3, (IEN | DIS | M0)) \ 249*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_D4, (IEN | DIS | M0)) \ 250*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_D5, (IEN | DIS | M0)) \ 251*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_D6, (IEN | DIS | M0)) \ 252*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_D7, (IEN | DIS | M0)) \ 253*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_D8, (IEN | DIS | M0)) \ 254*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_D9, (IEN | DIS | M0)) \ 255*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_D10, (IEN | DIS | M0)) \ 256*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_D11, (IEN | DIS | M0)) \ 257*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_D12, (IEN | DIS | M0)) \ 258*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_D13, (IEN | DIS | M0)) \ 259*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_D14, (IEN | DIS | M0)) \ 260*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_D15, (IEN | DIS | M0)) \ 261*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_D16, (IEN | DIS | M0)) \ 262*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_D17, (IEN | DIS | M0)) \ 263*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_D18, (IEN | DIS | M0)) \ 264*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_D19, (IEN | DIS | M0)) \ 265*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_D20, (IEN | DIS | M0)) \ 266*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_D21, (IEN | DIS | M0)) \ 267*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_D22, (IEN | DIS | M0)) \ 268*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_D23, (IEN | DIS | M0)) \ 269*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_D24, (IEN | DIS | M0)) \ 270*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_D25, (IEN | DIS | M0)) \ 271*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_D26, (IEN | DIS | M0)) \ 272*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_D27, (IEN | DIS | M0)) \ 273*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_D28, (IEN | DIS | M0)) \ 274*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_D29, (IEN | DIS | M0)) \ 275*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_D30, (IEN | DIS | M0)) \ 276*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_D31, (IEN | DIS | M0)) \ 277*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_DM0, (IDIS | DIS | M0)) \ 278*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_DM1, (IDIS | DIS | M0)) \ 279*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_DM2, (IDIS | DIS | M0)) \ 280*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_DM3, (IDIS | DIS | M0)) \ 281*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_DQS0, (IEN | DIS | M0)) \ 282*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_DQS1, (IEN | DIS | M0)) \ 283*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_DQS2, (IEN | DIS | M0)) \ 284*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_DQS3, (IEN | DIS | M0)) \ 285*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_NCAS, (IDIS | DIS | M0)) \ 286*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_NCLK, (IDIS | DIS | M0)) \ 287*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_NCS0, (IDIS | DIS | M0)) \ 288*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_NCS1, (IDIS | DIS | M0)) \ 289*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_NRAS, (IDIS | DIS | M0)) \ 290*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SDRC_NWE, (IDIS | DIS | M0)) \ 291*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SYS_32K, (IEN | DIS | M0)) \ 292*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SYS_BOOT0, (IEN | DIS | M0)) \ 293*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SYS_BOOT1, (IEN | DIS | M0)) \ 294*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SYS_BOOT2, (IEN | DIS | M0)) \ 295*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SYS_BOOT3, (IEN | DIS | M0)) \ 296*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SYS_BOOT4, (IEN | DIS | M0)) \ 297*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SYS_BOOT5, (IEN | DIS | M0)) \ 298*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SYS_BOOT6, (IEN | DIS | M0)) \ 299*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SYS_CLKOUT1, (IDIS | PTD | EN | M0)) \ 300*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SYS_CLKOUT2, (IDIS | PTD | EN | M0)) \ 301*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SYS_CLKREQ, (IEN | DIS | M0)) \ 302*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SYS_NIRQ, (IEN | PTU | EN | M0)) \ 303*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SYS_NRESWARM, (IEN | PTU | EN | M0)) \ 304*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_SYS_OFF_MODE, (IDIS | PTD | EN | M0)) \ 305*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_UART1_CTS, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ 306*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_UART1_RTS, (IDIS | DIS | SB_HIZ | SB_PU | M0)) \ 307*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_UART1_RX, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ 308*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_UART1_TX, (IDIS | DIS | SB_HIZ | SB_PU | M0)) \ 309*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_UART2_CTS, (IEN | PTU | EN | M7)) \ 310*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_UART2_RTS, (IEN | PTU | EN | M7)) \ 311*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_UART2_RX, (IEN | PTU | EN | M7)) \ 312*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_UART2_TX, (IEN | PTU | EN | M7)) \ 313*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_UART3_CTS_RCTX, \ 314*d275c40cSAlbert ARIBAUD \(3ADEV\) (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ 315*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_UART3_RTS_SD, (IDIS | DIS | SB_HIZ | SB_PU | M0)) \ 316*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_UART3_RX_IRRX, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ 317*d275c40cSAlbert ARIBAUD \(3ADEV\) MUX_VAL(CONTROL_PADCONF_UART3_TX_IRTX, (IDIS | DIS | SB_HIZ | SB_PU | M0)) \ 318*d275c40cSAlbert ARIBAUD \(3ADEV\) 319*d275c40cSAlbert ARIBAUD \(3ADEV\) #endif 320