1 /* 2 * (C) Copyright 2008 3 * Grazvydas Ignotas <notasas@gmail.com> 4 * 5 * Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by 6 * Richard Woodruff <r-woodruff2@ti.com> 7 * Syed Mohammed Khasim <khasim@ti.com> 8 * Sunil Kumar <sunilsaini05@gmail.com> 9 * Shashi Ranjan <shashiranjanmca05@gmail.com> 10 * 11 * (C) Copyright 2004-2008 12 * Texas Instruments, <www.ti.com> 13 * 14 * See file CREDITS for list of people who contributed to this 15 * project. 16 * 17 * This program is free software; you can redistribute it and/or 18 * modify it under the terms of the GNU General Public License as 19 * published by the Free Software Foundation; either version 2 of 20 * the License, or (at your option) any later version. 21 * 22 * This program is distributed in the hope that it will be useful, 23 * but WITHOUT ANY WARRANTY; without even the implied warranty of 24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 25 * GNU General Public License for more details. 26 * 27 * You should have received a copy of the GNU General Public License 28 * along with this program; if not, write to the Free Software 29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * MA 02111-1307 USA 31 */ 32 #include <common.h> 33 #include <twl4030.h> 34 #include <asm/io.h> 35 #include <asm/gpio.h> 36 #include <asm/arch/mmc_host_def.h> 37 #include <asm/arch/mux.h> 38 #include <asm/arch/gpio.h> 39 #include <asm/arch/sys_proto.h> 40 #include <asm/mach-types.h> 41 #include "pandora.h" 42 43 DECLARE_GLOBAL_DATA_PTR; 44 45 #define TWL4030_BB_CFG_BBCHEN (1 << 4) 46 #define TWL4030_BB_CFG_BBSEL_3200MV (3 << 2) 47 #define TWL4030_BB_CFG_BBISEL_500UA 2 48 49 #define CONTROL_WKUP_CTRL 0x48002a5c 50 #define GPIO_IO_PWRDNZ (1 << 6) 51 #define PBIASLITEVMODE1 (1 << 8) 52 53 /* 54 * Routine: board_init 55 * Description: Early hardware init. 56 */ 57 int board_init(void) 58 { 59 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ 60 /* board id for Linux */ 61 gd->bd->bi_arch_number = MACH_TYPE_OMAP3_PANDORA; 62 /* boot param addr */ 63 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); 64 65 return 0; 66 } 67 68 static void set_output_gpio(unsigned int gpio, int value) 69 { 70 int ret; 71 72 ret = gpio_request(gpio, ""); 73 if (ret != 0) { 74 printf("could not request GPIO %u\n", gpio); 75 return; 76 } 77 ret = gpio_direction_output(gpio, value); 78 if (ret != 0) 79 printf("could not set GPIO %u to %d\n", gpio, value); 80 } 81 82 /* 83 * Routine: misc_init_r 84 * Description: Configure board specific parts 85 */ 86 int misc_init_r(void) 87 { 88 t2_t *t2_base = (t2_t *)T2_BASE; 89 u32 pbias_lite; 90 91 twl4030_led_init(TWL4030_LED_LEDEN_LEDBON); 92 93 /* set up dual-voltage GPIOs to 1.8V */ 94 pbias_lite = readl(&t2_base->pbias_lite); 95 pbias_lite &= ~PBIASLITEVMODE1; 96 pbias_lite |= PBIASLITEPWRDNZ1; 97 writel(pbias_lite, &t2_base->pbias_lite); 98 if (get_cpu_family() == CPU_OMAP36XX) 99 writel(readl(CONTROL_WKUP_CTRL) | GPIO_IO_PWRDNZ, 100 CONTROL_WKUP_CTRL); 101 102 /* make sure audio and BT chips are in powerdown state */ 103 set_output_gpio(14, 0); 104 set_output_gpio(15, 0); 105 set_output_gpio(118, 0); 106 107 /* enable USB supply */ 108 set_output_gpio(164, 1); 109 110 /* wifi needs a short pulse to enter powersave state */ 111 set_output_gpio(23, 1); 112 udelay(5000); 113 gpio_direction_output(23, 0); 114 115 /* Enable battery backup capacitor (3.2V, 0.5mA charge current) */ 116 twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, 117 TWL4030_BB_CFG_BBCHEN | TWL4030_BB_CFG_BBSEL_3200MV | 118 TWL4030_BB_CFG_BBISEL_500UA, TWL4030_PM_RECEIVER_BB_CFG); 119 120 dieid_num_r(); 121 122 return 0; 123 } 124 125 /* 126 * Routine: set_muxconf_regs 127 * Description: Setting up the configuration Mux registers specific to the 128 * hardware. Many pins need to be moved from protect to primary 129 * mode. 130 */ 131 void set_muxconf_regs(void) 132 { 133 MUX_PANDORA(); 134 if (get_cpu_family() == CPU_OMAP36XX) { 135 MUX_PANDORA_3730(); 136 } 137 } 138 139 #ifdef CONFIG_GENERIC_MMC 140 int board_mmc_init(bd_t *bis) 141 { 142 omap_mmc_init(0, 0, 0); 143 return 0; 144 } 145 #endif 146