xref: /openbmc/u-boot/board/overo/overo.c (revision ed56fb1d)
1 /*
2  * Maintainer : Steve Sakoman <steve@sakoman.com>
3  *
4  * Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by
5  *	Richard Woodruff <r-woodruff2@ti.com>
6  *	Syed Mohammed Khasim <khasim@ti.com>
7  *	Sunil Kumar <sunilsaini05@gmail.com>
8  *	Shashi Ranjan <shashiranjanmca05@gmail.com>
9  *
10  * (C) Copyright 2004-2008
11  * Texas Instruments, <www.ti.com>
12  *
13  * See file CREDITS for list of people who contributed to this
14  * project.
15  *
16  * This program is free software; you can redistribute it and/or
17  * modify it under the terms of the GNU General Public License as
18  * published by the Free Software Foundation; either version 2 of
19  * the License, or (at your option) any later version.
20  *
21  * This program is distributed in the hope that it will be useful,
22  * but WITHOUT ANY WARRANTY; without even the implied warranty of
23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
24  * GNU General Public License for more details.
25  *
26  * You should have received a copy of the GNU General Public License
27  * along with this program; if not, write to the Free Software
28  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29  * MA 02111-1307 USA
30  */
31 #include <common.h>
32 #include <netdev.h>
33 #include <twl4030.h>
34 #include <asm/io.h>
35 #include <asm/arch/mux.h>
36 #include <asm/arch/mem.h>
37 #include <asm/arch/sys_proto.h>
38 #include <asm/arch/gpio.h>
39 #include <asm/mach-types.h>
40 #include "overo.h"
41 
42 #if defined(CONFIG_CMD_NET)
43 static void setup_net_chip(void);
44 #endif
45 
46 /*
47  * Routine: board_init
48  * Description: Early hardware init.
49  */
50 int board_init(void)
51 {
52 	DECLARE_GLOBAL_DATA_PTR;
53 
54 	gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
55 	/* board id for Linux */
56 	gd->bd->bi_arch_number = MACH_TYPE_OVERO;
57 	/* boot param addr */
58 	gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
59 
60 	return 0;
61 }
62 
63 /*
64  * Routine: misc_init_r
65  * Description: Configure board specific parts
66  */
67 int misc_init_r(void)
68 {
69 	twl4030_power_init();
70 	twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
71 
72 #if defined(CONFIG_CMD_NET)
73 	setup_net_chip();
74 #endif
75 
76 	dieid_num_r();
77 
78 	return 0;
79 }
80 
81 /*
82  * Routine: set_muxconf_regs
83  * Description: Setting up the configuration Mux registers specific to the
84  *		hardware. Many pins need to be moved from protect to primary
85  *		mode.
86  */
87 void set_muxconf_regs(void)
88 {
89 	MUX_OVERO();
90 }
91 
92 #if defined(CONFIG_CMD_NET)
93 /*
94  * Routine: setup_net_chip
95  * Description: Setting up the configuration GPMC registers specific to the
96  *	      Ethernet hardware.
97  */
98 static void setup_net_chip(void)
99 {
100 	struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
101 
102 	/* Configure GPMC registers */
103 	writel(NET_LAN9221_GPMC_CONFIG1, &gpmc_cfg->cs[5].config1);
104 	writel(NET_LAN9221_GPMC_CONFIG2, &gpmc_cfg->cs[5].config2);
105 	writel(NET_LAN9221_GPMC_CONFIG3, &gpmc_cfg->cs[5].config3);
106 	writel(NET_LAN9221_GPMC_CONFIG4, &gpmc_cfg->cs[5].config4);
107 	writel(NET_LAN9221_GPMC_CONFIG5, &gpmc_cfg->cs[5].config5);
108 	writel(NET_LAN9221_GPMC_CONFIG6, &gpmc_cfg->cs[5].config6);
109 	writel(NET_LAN9221_GPMC_CONFIG7, &gpmc_cfg->cs[5].config7);
110 
111 	/* Enable off mode for NWE in PADCONF_GPMC_NWE register */
112 	writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
113 	/* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
114 	writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
115 	/* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
116 	writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
117 		&ctrl_base->gpmc_nadv_ale);
118 
119 	/* Make GPIO 64 as output pin and send a magic pulse through it */
120 	if (!omap_request_gpio(64)) {
121 		omap_set_gpio_direction(64, 0);
122 		omap_set_gpio_dataout(64, 1);
123 		udelay(1);
124 		omap_set_gpio_dataout(64, 0);
125 		udelay(1);
126 		omap_set_gpio_dataout(64, 1);
127 	}
128 }
129 #endif
130 
131 int board_eth_init(bd_t *bis)
132 {
133 	int rc = 0;
134 #ifdef CONFIG_SMC911X
135 	rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
136 #endif
137 	return rc;
138 }
139