1 /* 2 * Maintainer : Steve Sakoman <steve@sakoman.com> 3 * 4 * Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by 5 * Richard Woodruff <r-woodruff2@ti.com> 6 * Syed Mohammed Khasim <khasim@ti.com> 7 * Sunil Kumar <sunilsaini05@gmail.com> 8 * Shashi Ranjan <shashiranjanmca05@gmail.com> 9 * 10 * (C) Copyright 2004-2008 11 * Texas Instruments, <www.ti.com> 12 * 13 * SPDX-License-Identifier: GPL-2.0+ 14 */ 15 #include <common.h> 16 #include <dm.h> 17 #include <ns16550.h> 18 #include <netdev.h> 19 #include <twl4030.h> 20 #include <linux/mtd/nand.h> 21 #include <asm/io.h> 22 #include <asm/arch/mmc_host_def.h> 23 #include <asm/arch/mux.h> 24 #include <asm/arch/mem.h> 25 #include <asm/arch/sys_proto.h> 26 #include <asm/gpio.h> 27 #include <asm/mach-types.h> 28 #include "overo.h" 29 30 DECLARE_GLOBAL_DATA_PTR; 31 32 #define TWL4030_I2C_BUS 0 33 #define EXPANSION_EEPROM_I2C_BUS 2 34 #define EXPANSION_EEPROM_I2C_ADDRESS 0x51 35 36 #define GUMSTIX_SUMMIT 0x01000200 37 #define GUMSTIX_TOBI 0x02000200 38 #define GUMSTIX_TOBI_DUO 0x03000200 39 #define GUMSTIX_PALO35 0x04000200 40 #define GUMSTIX_PALO43 0x05000200 41 #define GUMSTIX_CHESTNUT43 0x06000200 42 #define GUMSTIX_PINTO 0x07000200 43 #define GUMSTIX_GALLOP43 0x08000200 44 #define GUMSTIX_ALTO35 0x09000200 45 #define GUMSTIX_STAGECOACH 0x0A000200 46 #define GUMSTIX_THUMBO 0x0B000200 47 #define GUMSTIX_TURTLECORE 0x0C000200 48 #define GUMSTIX_ARBOR43C 0x0D000200 49 50 #define ETTUS_USRP_E 0x01000300 51 52 #define GUMSTIX_NO_EEPROM 0xffffffff 53 54 static struct { 55 unsigned int device_vendor; 56 unsigned char revision; 57 unsigned char content; 58 char fab_revision[8]; 59 char env_var[16]; 60 char env_setting[64]; 61 } expansion_config; 62 63 #if defined(CONFIG_CMD_NET) 64 static void setup_net_chip(void); 65 #endif 66 67 /* GPMC definitions for LAN9221 chips on Tobi expansion boards */ 68 static const u32 gpmc_lan_config[] = { 69 NET_LAN9221_GPMC_CONFIG1, 70 NET_LAN9221_GPMC_CONFIG2, 71 NET_LAN9221_GPMC_CONFIG3, 72 NET_LAN9221_GPMC_CONFIG4, 73 NET_LAN9221_GPMC_CONFIG5, 74 NET_LAN9221_GPMC_CONFIG6, 75 /*CONFIG7- computed as params */ 76 }; 77 78 static const struct ns16550_platdata overo_serial = { 79 OMAP34XX_UART3, 80 2, 81 V_NS16550_CLK 82 }; 83 84 U_BOOT_DEVICE(overo_uart) = { 85 "serial_omap", 86 &overo_serial 87 }; 88 89 /* 90 * Routine: board_init 91 * Description: Early hardware init. 92 */ 93 int board_init(void) 94 { 95 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ 96 /* board id for Linux */ 97 gd->bd->bi_arch_number = MACH_TYPE_OVERO; 98 /* boot param addr */ 99 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); 100 101 return 0; 102 } 103 104 /* 105 * Routine: get_board_revision 106 * Description: Returns the board revision 107 */ 108 int get_board_revision(void) 109 { 110 int revision; 111 112 #ifdef CONFIG_SYS_I2C_OMAP34XX 113 unsigned char data; 114 115 /* board revisions <= R2410 connect 4030 irq_1 to gpio112 */ 116 /* these boards should return a revision number of 0 */ 117 /* the code below forces a 4030 RTC irq to ensure that gpio112 is low */ 118 i2c_set_bus_num(TWL4030_I2C_BUS); 119 data = 0x01; 120 i2c_write(0x4B, 0x29, 1, &data, 1); 121 data = 0x0c; 122 i2c_write(0x4B, 0x2b, 1, &data, 1); 123 i2c_read(0x4B, 0x2a, 1, &data, 1); 124 #endif 125 126 if (!gpio_request(112, "") && 127 !gpio_request(113, "") && 128 !gpio_request(115, "")) { 129 130 gpio_direction_input(112); 131 gpio_direction_input(113); 132 gpio_direction_input(115); 133 134 revision = gpio_get_value(115) << 2 | 135 gpio_get_value(113) << 1 | 136 gpio_get_value(112); 137 } else { 138 puts("Error: unable to acquire board revision GPIOs\n"); 139 revision = -1; 140 } 141 142 return revision; 143 } 144 145 #ifdef CONFIG_SPL_BUILD 146 /* 147 * Routine: get_board_mem_timings 148 * Description: If we use SPL then there is no x-loader nor config header 149 * so we have to setup the DDR timings ourself on both banks. 150 */ 151 void get_board_mem_timings(struct board_sdrc_timings *timings) 152 { 153 timings->mr = MICRON_V_MR_165; 154 switch (get_board_revision()) { 155 case REVISION_0: /* Micron 1286MB/256MB, 1/2 banks of 128MB */ 156 timings->mcfg = MICRON_V_MCFG_165(128 << 20); 157 timings->ctrla = MICRON_V_ACTIMA_165; 158 timings->ctrlb = MICRON_V_ACTIMB_165; 159 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; 160 break; 161 case REVISION_1: /* Micron 256MB/512MB, 1/2 banks of 256MB */ 162 case REVISION_4: 163 timings->mcfg = MICRON_V_MCFG_200(256 << 20); 164 timings->ctrla = MICRON_V_ACTIMA_200; 165 timings->ctrlb = MICRON_V_ACTIMB_200; 166 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; 167 break; 168 case REVISION_2: /* Hynix 256MB/512MB, 1/2 banks of 256MB */ 169 timings->mcfg = HYNIX_V_MCFG_200(256 << 20); 170 timings->ctrla = HYNIX_V_ACTIMA_200; 171 timings->ctrlb = HYNIX_V_ACTIMB_200; 172 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; 173 break; 174 case REVISION_3: /* Micron 512MB/1024MB, 1/2 banks of 512MB */ 175 timings->mcfg = MCFG(512 << 20, 15); 176 timings->ctrla = MICRON_V_ACTIMA_200; 177 timings->ctrlb = MICRON_V_ACTIMB_200; 178 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; 179 break; 180 default: 181 timings->mcfg = MICRON_V_MCFG_165(128 << 20); 182 timings->ctrla = MICRON_V_ACTIMA_165; 183 timings->ctrlb = MICRON_V_ACTIMB_165; 184 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; 185 } 186 } 187 #endif 188 189 /* 190 * Routine: get_sdio2_config 191 * Description: Return information about the wifi module connection 192 * Returns 0 if the module connects though a level translator 193 * Returns 1 if the module connects directly 194 */ 195 int get_sdio2_config(void) 196 { 197 int sdio_direct; 198 199 if (!gpio_request(130, "") && !gpio_request(139, "")) { 200 201 gpio_direction_output(130, 0); 202 gpio_direction_input(139); 203 204 sdio_direct = 1; 205 gpio_set_value(130, 0); 206 if (gpio_get_value(139) == 0) { 207 gpio_set_value(130, 1); 208 if (gpio_get_value(139) == 1) 209 sdio_direct = 0; 210 } 211 212 gpio_direction_input(130); 213 } else { 214 puts("Error: unable to acquire sdio2 clk GPIOs\n"); 215 sdio_direct = -1; 216 } 217 218 return sdio_direct; 219 } 220 221 /* 222 * Routine: get_expansion_id 223 * Description: This function checks for expansion board by checking I2C 224 * bus 2 for the availability of an AT24C01B serial EEPROM. 225 * returns the device_vendor field from the EEPROM 226 */ 227 unsigned int get_expansion_id(void) 228 { 229 i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS); 230 231 /* return GUMSTIX_NO_EEPROM if eeprom doesn't respond */ 232 if (i2c_probe(EXPANSION_EEPROM_I2C_ADDRESS) == 1) { 233 i2c_set_bus_num(TWL4030_I2C_BUS); 234 return GUMSTIX_NO_EEPROM; 235 } 236 237 /* read configuration data */ 238 i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config, 239 sizeof(expansion_config)); 240 241 i2c_set_bus_num(TWL4030_I2C_BUS); 242 243 return expansion_config.device_vendor; 244 } 245 246 /* 247 * Routine: misc_init_r 248 * Description: Configure board specific parts 249 */ 250 int misc_init_r(void) 251 { 252 unsigned int expansion_id; 253 254 twl4030_power_init(); 255 twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON); 256 257 #if defined(CONFIG_CMD_NET) 258 setup_net_chip(); 259 #endif 260 261 printf("Board revision: %d\n", get_board_revision()); 262 263 switch (get_sdio2_config()) { 264 case 0: 265 puts("Tranceiver detected on mmc2\n"); 266 MUX_OVERO_SDIO2_TRANSCEIVER(); 267 break; 268 case 1: 269 puts("Direct connection on mmc2\n"); 270 MUX_OVERO_SDIO2_DIRECT(); 271 break; 272 default: 273 puts("Unable to detect mmc2 connection type\n"); 274 } 275 276 expansion_id = get_expansion_id(); 277 switch (expansion_id) { 278 case GUMSTIX_SUMMIT: 279 printf("Recognized Summit expansion board (rev %d %s)\n", 280 expansion_config.revision, 281 expansion_config.fab_revision); 282 setenv("defaultdisplay", "dvi"); 283 setenv("expansionname", "summit"); 284 break; 285 case GUMSTIX_TOBI: 286 printf("Recognized Tobi expansion board (rev %d %s)\n", 287 expansion_config.revision, 288 expansion_config.fab_revision); 289 setenv("defaultdisplay", "dvi"); 290 setenv("expansionname", "tobi"); 291 break; 292 case GUMSTIX_TOBI_DUO: 293 printf("Recognized Tobi Duo expansion board (rev %d %s)\n", 294 expansion_config.revision, 295 expansion_config.fab_revision); 296 /* second lan chip */ 297 enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[4], 298 0x2B000000, GPMC_SIZE_16M); 299 break; 300 case GUMSTIX_PALO35: 301 printf("Recognized Palo35 expansion board (rev %d %s)\n", 302 expansion_config.revision, 303 expansion_config.fab_revision); 304 setenv("defaultdisplay", "lcd35"); 305 break; 306 case GUMSTIX_PALO43: 307 printf("Recognized Palo43 expansion board (rev %d %s)\n", 308 expansion_config.revision, 309 expansion_config.fab_revision); 310 setenv("defaultdisplay", "lcd43"); 311 setenv("expansionname", "palo43"); 312 break; 313 case GUMSTIX_CHESTNUT43: 314 printf("Recognized Chestnut43 expansion board (rev %d %s)\n", 315 expansion_config.revision, 316 expansion_config.fab_revision); 317 setenv("defaultdisplay", "lcd43"); 318 setenv("expansionname", "chestnut43"); 319 break; 320 case GUMSTIX_PINTO: 321 printf("Recognized Pinto expansion board (rev %d %s)\n", 322 expansion_config.revision, 323 expansion_config.fab_revision); 324 break; 325 case GUMSTIX_GALLOP43: 326 printf("Recognized Gallop43 expansion board (rev %d %s)\n", 327 expansion_config.revision, 328 expansion_config.fab_revision); 329 setenv("defaultdisplay", "lcd43"); 330 setenv("expansionname", "gallop43"); 331 break; 332 case GUMSTIX_ALTO35: 333 printf("Recognized Alto35 expansion board (rev %d %s)\n", 334 expansion_config.revision, 335 expansion_config.fab_revision); 336 MUX_ALTO35(); 337 setenv("defaultdisplay", "lcd35"); 338 setenv("expansionname", "alto35"); 339 break; 340 case GUMSTIX_STAGECOACH: 341 printf("Recognized Stagecoach expansion board (rev %d %s)\n", 342 expansion_config.revision, 343 expansion_config.fab_revision); 344 break; 345 case GUMSTIX_THUMBO: 346 printf("Recognized Thumbo expansion board (rev %d %s)\n", 347 expansion_config.revision, 348 expansion_config.fab_revision); 349 break; 350 case GUMSTIX_TURTLECORE: 351 printf("Recognized Turtlecore expansion board (rev %d %s)\n", 352 expansion_config.revision, 353 expansion_config.fab_revision); 354 break; 355 case GUMSTIX_ARBOR43C: 356 printf("Recognized Arbor43C expansion board (rev %d %s)\n", 357 expansion_config.revision, 358 expansion_config.fab_revision); 359 MUX_ARBOR43C(); 360 setenv("defaultdisplay", "lcd43"); 361 break; 362 case ETTUS_USRP_E: 363 printf("Recognized Ettus Research USRP-E (rev %d %s)\n", 364 expansion_config.revision, 365 expansion_config.fab_revision); 366 MUX_USRP_E(); 367 setenv("defaultdisplay", "dvi"); 368 break; 369 case GUMSTIX_NO_EEPROM: 370 puts("No EEPROM on expansion board\n"); 371 setenv("expansionname", "tobi"); 372 break; 373 default: 374 if (expansion_id == 0x0) 375 setenv("expansionname", "tobi"); 376 printf("Unrecognized expansion board 0x%08x\n", expansion_id); 377 break; 378 } 379 380 if (expansion_config.content == 1) 381 setenv(expansion_config.env_var, expansion_config.env_setting); 382 383 dieid_num_r(); 384 385 if (get_cpu_family() == CPU_OMAP34XX) 386 setenv("boardname", "overo"); 387 else 388 setenv("boardname", "overo-storm"); 389 390 return 0; 391 } 392 393 /* 394 * Routine: set_muxconf_regs 395 * Description: Setting up the configuration Mux registers specific to the 396 * hardware. Many pins need to be moved from protect to primary 397 * mode. 398 */ 399 void set_muxconf_regs(void) 400 { 401 MUX_OVERO(); 402 } 403 404 #if defined(CONFIG_CMD_NET) 405 /* 406 * Routine: setup_net_chip 407 * Description: Setting up the configuration GPMC registers specific to the 408 * Ethernet hardware. 409 */ 410 static void setup_net_chip(void) 411 { 412 struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; 413 414 /* first lan chip */ 415 enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5], 0x2C000000, 416 GPMC_SIZE_16M); 417 418 /* Enable off mode for NWE in PADCONF_GPMC_NWE register */ 419 writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe); 420 /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */ 421 writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe); 422 /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */ 423 writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00, 424 &ctrl_base->gpmc_nadv_ale); 425 426 /* Make GPIO 64 as output pin and send a magic pulse through it */ 427 if (!gpio_request(64, "")) { 428 gpio_direction_output(64, 0); 429 gpio_set_value(64, 1); 430 udelay(1); 431 gpio_set_value(64, 0); 432 udelay(1); 433 gpio_set_value(64, 1); 434 } 435 } 436 #endif 437 438 int board_eth_init(bd_t *bis) 439 { 440 int rc = 0; 441 #ifdef CONFIG_SMC911X 442 rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); 443 #endif 444 return rc; 445 } 446 447 #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD) 448 int board_mmc_init(bd_t *bis) 449 { 450 return omap_mmc_init(0, 0, 0, -1, -1); 451 } 452 #endif 453