1 /* 2 * Maintainer : Steve Sakoman <steve@sakoman.com> 3 * 4 * Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by 5 * Richard Woodruff <r-woodruff2@ti.com> 6 * Syed Mohammed Khasim <khasim@ti.com> 7 * Sunil Kumar <sunilsaini05@gmail.com> 8 * Shashi Ranjan <shashiranjanmca05@gmail.com> 9 * 10 * (C) Copyright 2004-2008 11 * Texas Instruments, <www.ti.com> 12 * 13 * See file CREDITS for list of people who contributed to this 14 * project. 15 * 16 * This program is free software; you can redistribute it and/or 17 * modify it under the terms of the GNU General Public License as 18 * published by the Free Software Foundation; either version 2 of 19 * the License, or (at your option) any later version. 20 * 21 * This program is distributed in the hope that it will be useful, 22 * but WITHOUT ANY WARRANTY; without even the implied warranty of 23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 24 * GNU General Public License for more details. 25 * 26 * You should have received a copy of the GNU General Public License 27 * along with this program; if not, write to the Free Software 28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 29 * MA 02111-1307 USA 30 */ 31 #include <common.h> 32 #include <netdev.h> 33 #include <twl4030.h> 34 #include <linux/mtd/nand.h> 35 #include <asm/io.h> 36 #include <asm/arch/mmc_host_def.h> 37 #include <asm/arch/mux.h> 38 #include <asm/arch/mem.h> 39 #include <asm/arch/sys_proto.h> 40 #include <asm/arch/omap_gpmc.h> 41 #include <asm/gpio.h> 42 #include <asm/mach-types.h> 43 #include "overo.h" 44 45 DECLARE_GLOBAL_DATA_PTR; 46 47 #define TWL4030_I2C_BUS 0 48 #define EXPANSION_EEPROM_I2C_BUS 2 49 #define EXPANSION_EEPROM_I2C_ADDRESS 0x51 50 51 #define GUMSTIX_SUMMIT 0x01000200 52 #define GUMSTIX_TOBI 0x02000200 53 #define GUMSTIX_TOBI_DUO 0x03000200 54 #define GUMSTIX_PALO35 0x04000200 55 #define GUMSTIX_PALO43 0x05000200 56 #define GUMSTIX_CHESTNUT43 0x06000200 57 #define GUMSTIX_PINTO 0x07000200 58 #define GUMSTIX_GALLOP43 0x08000200 59 60 #define ETTUS_USRP_E 0x01000300 61 62 #define GUMSTIX_NO_EEPROM 0xffffffff 63 64 static struct { 65 unsigned int device_vendor; 66 unsigned char revision; 67 unsigned char content; 68 char fab_revision[8]; 69 char env_var[16]; 70 char env_setting[64]; 71 } expansion_config; 72 73 #if defined(CONFIG_CMD_NET) 74 static void setup_net_chip(void); 75 #endif 76 77 /* GPMC definitions for LAN9221 chips on Tobi expansion boards */ 78 static const u32 gpmc_lan_config[] = { 79 NET_LAN9221_GPMC_CONFIG1, 80 NET_LAN9221_GPMC_CONFIG2, 81 NET_LAN9221_GPMC_CONFIG3, 82 NET_LAN9221_GPMC_CONFIG4, 83 NET_LAN9221_GPMC_CONFIG5, 84 NET_LAN9221_GPMC_CONFIG6, 85 /*CONFIG7- computed as params */ 86 }; 87 88 /* 89 * Routine: board_init 90 * Description: Early hardware init. 91 */ 92 int board_init(void) 93 { 94 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ 95 /* board id for Linux */ 96 gd->bd->bi_arch_number = MACH_TYPE_OVERO; 97 /* boot param addr */ 98 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); 99 100 return 0; 101 } 102 103 /* 104 * Routine: get_board_revision 105 * Description: Returns the board revision 106 */ 107 int get_board_revision(void) 108 { 109 int revision; 110 111 #ifdef CONFIG_DRIVER_OMAP34XX_I2C 112 unsigned char data; 113 114 /* board revisions <= R2410 connect 4030 irq_1 to gpio112 */ 115 /* these boards should return a revision number of 0 */ 116 /* the code below forces a 4030 RTC irq to ensure that gpio112 is low */ 117 i2c_set_bus_num(TWL4030_I2C_BUS); 118 data = 0x01; 119 i2c_write(0x4B, 0x29, 1, &data, 1); 120 data = 0x0c; 121 i2c_write(0x4B, 0x2b, 1, &data, 1); 122 i2c_read(0x4B, 0x2a, 1, &data, 1); 123 #endif 124 125 if (!gpio_request(112, "") && 126 !gpio_request(113, "") && 127 !gpio_request(115, "")) { 128 129 gpio_direction_input(112); 130 gpio_direction_input(113); 131 gpio_direction_input(115); 132 133 revision = gpio_get_value(115) << 2 | 134 gpio_get_value(113) << 1 | 135 gpio_get_value(112); 136 } else { 137 puts("Error: unable to acquire board revision GPIOs\n"); 138 revision = -1; 139 } 140 141 return revision; 142 } 143 144 #ifdef CONFIG_SPL_BUILD 145 /* 146 * Routine: get_board_mem_timings 147 * Description: If we use SPL then there is no x-loader nor config header 148 * so we have to setup the DDR timings ourself on both banks. 149 */ 150 void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, 151 u32 *mr) 152 { 153 *mr = MICRON_V_MR_165; 154 switch (get_board_revision()) { 155 case REVISION_0: /* Micron 1286MB/256MB, 1/2 banks of 128MB */ 156 *mcfg = MICRON_V_MCFG_165(128 << 20); 157 *ctrla = MICRON_V_ACTIMA_165; 158 *ctrlb = MICRON_V_ACTIMB_165; 159 *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; 160 break; 161 case REVISION_1: /* Micron 256MB/512MB, 1/2 banks of 256MB */ 162 *mcfg = MICRON_V_MCFG_165(256 << 20); 163 *ctrla = MICRON_V_ACTIMA_165; 164 *ctrlb = MICRON_V_ACTIMB_165; 165 *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; 166 break; 167 case REVISION_2: /* Hynix 256MB/512MB, 1/2 banks of 256MB */ 168 *mcfg = HYNIX_V_MCFG_165(256 << 20); 169 *ctrla = HYNIX_V_ACTIMA_165; 170 *ctrlb = HYNIX_V_ACTIMB_165; 171 *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; 172 break; 173 default: 174 *mcfg = MICRON_V_MCFG_165(128 << 20); 175 *ctrla = MICRON_V_ACTIMA_165; 176 *ctrlb = MICRON_V_ACTIMB_165; 177 *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; 178 } 179 } 180 #endif 181 182 /* 183 * Routine: get_sdio2_config 184 * Description: Return information about the wifi module connection 185 * Returns 0 if the module connects though a level translator 186 * Returns 1 if the module connects directly 187 */ 188 int get_sdio2_config(void) 189 { 190 int sdio_direct; 191 192 if (!gpio_request(130, "") && !gpio_request(139, "")) { 193 194 gpio_direction_output(130, 0); 195 gpio_direction_input(139); 196 197 sdio_direct = 1; 198 gpio_set_value(130, 0); 199 if (gpio_get_value(139) == 0) { 200 gpio_set_value(130, 1); 201 if (gpio_get_value(139) == 1) 202 sdio_direct = 0; 203 } 204 205 gpio_direction_input(130); 206 } else { 207 puts("Error: unable to acquire sdio2 clk GPIOs\n"); 208 sdio_direct = -1; 209 } 210 211 return sdio_direct; 212 } 213 214 /* 215 * Routine: get_expansion_id 216 * Description: This function checks for expansion board by checking I2C 217 * bus 2 for the availability of an AT24C01B serial EEPROM. 218 * returns the device_vendor field from the EEPROM 219 */ 220 unsigned int get_expansion_id(void) 221 { 222 i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS); 223 224 /* return GUMSTIX_NO_EEPROM if eeprom doesn't respond */ 225 if (i2c_probe(EXPANSION_EEPROM_I2C_ADDRESS) == 1) { 226 i2c_set_bus_num(TWL4030_I2C_BUS); 227 return GUMSTIX_NO_EEPROM; 228 } 229 230 /* read configuration data */ 231 i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config, 232 sizeof(expansion_config)); 233 234 i2c_set_bus_num(TWL4030_I2C_BUS); 235 236 return expansion_config.device_vendor; 237 } 238 239 /* 240 * Routine: misc_init_r 241 * Description: Configure board specific parts 242 */ 243 int misc_init_r(void) 244 { 245 twl4030_power_init(); 246 twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON); 247 248 #if defined(CONFIG_CMD_NET) 249 setup_net_chip(); 250 #endif 251 252 printf("Board revision: %d\n", get_board_revision()); 253 254 switch (get_sdio2_config()) { 255 case 0: 256 puts("Tranceiver detected on mmc2\n"); 257 MUX_OVERO_SDIO2_TRANSCEIVER(); 258 break; 259 case 1: 260 puts("Direct connection on mmc2\n"); 261 MUX_OVERO_SDIO2_DIRECT(); 262 break; 263 default: 264 puts("Unable to detect mmc2 connection type\n"); 265 } 266 267 switch (get_expansion_id()) { 268 case GUMSTIX_SUMMIT: 269 printf("Recognized Summit expansion board (rev %d %s)\n", 270 expansion_config.revision, 271 expansion_config.fab_revision); 272 setenv("defaultdisplay", "dvi"); 273 break; 274 case GUMSTIX_TOBI: 275 printf("Recognized Tobi expansion board (rev %d %s)\n", 276 expansion_config.revision, 277 expansion_config.fab_revision); 278 setenv("defaultdisplay", "dvi"); 279 break; 280 case GUMSTIX_TOBI_DUO: 281 printf("Recognized Tobi Duo expansion board (rev %d %s)\n", 282 expansion_config.revision, 283 expansion_config.fab_revision); 284 /* second lan chip */ 285 enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[4], 286 0x2B000000, GPMC_SIZE_16M); 287 break; 288 case GUMSTIX_PALO35: 289 printf("Recognized Palo35 expansion board (rev %d %s)\n", 290 expansion_config.revision, 291 expansion_config.fab_revision); 292 setenv("defaultdisplay", "lcd35"); 293 break; 294 case GUMSTIX_PALO43: 295 printf("Recognized Palo43 expansion board (rev %d %s)\n", 296 expansion_config.revision, 297 expansion_config.fab_revision); 298 setenv("defaultdisplay", "lcd43"); 299 break; 300 case GUMSTIX_CHESTNUT43: 301 printf("Recognized Chestnut43 expansion board (rev %d %s)\n", 302 expansion_config.revision, 303 expansion_config.fab_revision); 304 setenv("defaultdisplay", "lcd43"); 305 break; 306 case GUMSTIX_PINTO: 307 printf("Recognized Pinto expansion board (rev %d %s)\n", 308 expansion_config.revision, 309 expansion_config.fab_revision); 310 break; 311 case GUMSTIX_GALLOP43: 312 printf("Recognized Gallop43 expansion board (rev %d %s)\n", 313 expansion_config.revision, 314 expansion_config.fab_revision); 315 setenv("defaultdisplay", "lcd43"); 316 break; 317 case ETTUS_USRP_E: 318 printf("Recognized Ettus Research USRP-E (rev %d %s)\n", 319 expansion_config.revision, 320 expansion_config.fab_revision); 321 MUX_USRP_E(); 322 setenv("defaultdisplay", "dvi"); 323 break; 324 case GUMSTIX_NO_EEPROM: 325 puts("No EEPROM on expansion board\n"); 326 break; 327 default: 328 puts("Unrecognized expansion board\n"); 329 } 330 331 if (expansion_config.content == 1) 332 setenv(expansion_config.env_var, expansion_config.env_setting); 333 334 dieid_num_r(); 335 336 return 0; 337 } 338 339 /* 340 * Routine: set_muxconf_regs 341 * Description: Setting up the configuration Mux registers specific to the 342 * hardware. Many pins need to be moved from protect to primary 343 * mode. 344 */ 345 void set_muxconf_regs(void) 346 { 347 MUX_OVERO(); 348 } 349 350 #if defined(CONFIG_CMD_NET) 351 /* 352 * Routine: setup_net_chip 353 * Description: Setting up the configuration GPMC registers specific to the 354 * Ethernet hardware. 355 */ 356 static void setup_net_chip(void) 357 { 358 struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; 359 360 /* first lan chip */ 361 enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5], 0x2C000000, 362 GPMC_SIZE_16M); 363 364 /* Enable off mode for NWE in PADCONF_GPMC_NWE register */ 365 writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe); 366 /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */ 367 writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe); 368 /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */ 369 writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00, 370 &ctrl_base->gpmc_nadv_ale); 371 372 /* Make GPIO 64 as output pin and send a magic pulse through it */ 373 if (!gpio_request(64, "")) { 374 gpio_direction_output(64, 0); 375 gpio_set_value(64, 1); 376 udelay(1); 377 gpio_set_value(64, 0); 378 udelay(1); 379 gpio_set_value(64, 1); 380 } 381 } 382 #endif 383 384 int board_eth_init(bd_t *bis) 385 { 386 int rc = 0; 387 #ifdef CONFIG_SMC911X 388 rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); 389 #endif 390 return rc; 391 } 392 393 #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD) 394 int board_mmc_init(bd_t *bis) 395 { 396 omap_mmc_init(0, 0, 0); 397 return 0; 398 } 399 #endif 400