1 /* 2 * (C) Copyright 2010,2011 3 * NVIDIA Corporation <www.nvidia.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #include <common.h> 9 #include <asm/io.h> 10 #include <asm/mach-types.h> 11 #include <asm/arch/tegra.h> 12 #include <asm/arch-tegra/board.h> 13 #include <asm/arch/clock.h> 14 #include <asm/arch/funcmux.h> 15 #include <asm/arch/gpio.h> 16 #include <asm/arch/pinmux.h> 17 #include <asm/gpio.h> 18 19 /* TODO: Remove this code when the SPI switch is working */ 20 #if (CONFIG_MACH_TYPE != MACH_TYPE_VENTANA) 21 void gpio_early_init_uart(void) 22 { 23 /* Enable UART via GPIO_PI3 (port 8, bit 3) so serial console works */ 24 gpio_request(TEGRA_GPIO(I, 3), "uart_en"); 25 gpio_direction_output(TEGRA_GPIO(I, 3), 0); 26 } 27 #endif 28 29 #ifdef CONFIG_MMC_SDHCI_TEGRA 30 /* 31 * Routine: pin_mux_mmc 32 * Description: setup the pin muxes/tristate values for the SDMMC(s) 33 */ 34 void pin_mux_mmc(void) 35 { 36 funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT); 37 funcmux_select(PERIPH_ID_SDMMC3, FUNCMUX_SDMMC3_SDB_4BIT); 38 39 /* For power GPIO PI6 */ 40 pinmux_tristate_disable(PMUX_PINGRP_ATA); 41 /* For CD GPIO PI5 */ 42 pinmux_tristate_disable(PMUX_PINGRP_ATC); 43 } 44 #endif 45 46 void pin_mux_usb(void) 47 { 48 /* For USB0's GPIO PD0. For now, since we have no pinmux in fdt */ 49 pinmux_tristate_disable(PMUX_PINGRP_SLXK); 50 /* For USB1's ULPI signals */ 51 funcmux_select(PERIPH_ID_USB2, FUNCMUX_USB2_ULPI); 52 pinmux_set_func(PMUX_PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4); 53 pinmux_tristate_disable(PMUX_PINGRP_CDEV2); 54 /* USB1 PHY reset GPIO */ 55 pinmux_tristate_disable(PMUX_PINGRP_UAC); 56 } 57