1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+ 2f05fa678SStephen Warren /* 3f05fa678SStephen Warren * (C) Copyright 2013-2015 4f05fa678SStephen Warren * NVIDIA Corporation <www.nvidia.com> 5f05fa678SStephen Warren */ 6f05fa678SStephen Warren 7f05fa678SStephen Warren #include <common.h> 8f05fa678SStephen Warren #include <i2c.h> 9f05fa678SStephen Warren #include <asm/arch/gpio.h> 10f05fa678SStephen Warren #include <asm/arch/pinmux.h> 11f05fa678SStephen Warren #include "../p2571/max77620_init.h" 12f05fa678SStephen Warren #include "pinmux-config-p2371-0000.h" 13f05fa678SStephen Warren 14f05fa678SStephen Warren void pin_mux_mmc(void) 15f05fa678SStephen Warren { 16f05fa678SStephen Warren struct udevice *dev; 17f05fa678SStephen Warren uchar val; 18f05fa678SStephen Warren int ret; 19f05fa678SStephen Warren 20f05fa678SStephen Warren /* Turn on MAX77620 LDO2 to 3.3V for SD card power */ 21f05fa678SStephen Warren debug("%s: Set LDO2 for VDDIO_SDMMC_AP power to 3.3V\n", __func__); 22f05fa678SStephen Warren ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); 23f05fa678SStephen Warren if (ret) { 24f05fa678SStephen Warren printf("%s: Cannot find MAX77620 I2C chip\n", __func__); 25f05fa678SStephen Warren return; 26f05fa678SStephen Warren } 27f05fa678SStephen Warren /* 0xF2 for 3.3v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ 28f05fa678SStephen Warren val = 0xF2; 29f05fa678SStephen Warren ret = dm_i2c_write(dev, MAX77620_CNFG1_L2_REG, &val, 1); 30f05fa678SStephen Warren if (ret) 31f05fa678SStephen Warren printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret); 32f05fa678SStephen Warren } 33f05fa678SStephen Warren 34f05fa678SStephen Warren /* 35f05fa678SStephen Warren * Routine: pinmux_init 36f05fa678SStephen Warren * Description: Do individual peripheral pinmux configs 37f05fa678SStephen Warren */ 38f05fa678SStephen Warren void pinmux_init(void) 39f05fa678SStephen Warren { 40f05fa678SStephen Warren pinmux_clear_tristate_input_clamping(); 41f05fa678SStephen Warren 42f05fa678SStephen Warren gpio_config_table(p2371_0000_gpio_inits, 43f05fa678SStephen Warren ARRAY_SIZE(p2371_0000_gpio_inits)); 44f05fa678SStephen Warren 45f05fa678SStephen Warren pinmux_config_pingrp_table(p2371_0000_pingrps, 46f05fa678SStephen Warren ARRAY_SIZE(p2371_0000_pingrps)); 47f05fa678SStephen Warren 48f05fa678SStephen Warren pinmux_config_drvgrp_table(p2371_0000_drvgrps, 49f05fa678SStephen Warren ARRAY_SIZE(p2371_0000_drvgrps)); 50f05fa678SStephen Warren } 51