xref: /openbmc/u-boot/board/nvidia/harmony/harmony.c (revision dd1033e4)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  *  (C) Copyright 2010,2011
4  *  NVIDIA Corporation <www.nvidia.com>
5  */
6 
7 #include <common.h>
8 #include <lcd.h>
9 #include <asm/io.h>
10 #include <asm/arch/clock.h>
11 #include <asm/arch/funcmux.h>
12 #include <asm/arch/pinmux.h>
13 #include <asm/arch/tegra.h>
14 #include <asm/gpio.h>
15 
16 #ifdef CONFIG_MMC_SDHCI_TEGRA
17 /*
18  * Routine: pin_mux_mmc
19  * Description: setup the pin muxes/tristate values for the SDMMC(s)
20  */
21 void pin_mux_mmc(void)
22 {
23 	funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT);
24 	funcmux_select(PERIPH_ID_SDMMC2, FUNCMUX_SDMMC2_DTA_DTD_8BIT);
25 
26 	/* For power GPIO PI6 */
27 	pinmux_tristate_disable(PMUX_PINGRP_ATA);
28 	/* For CD GPIO PH2 */
29 	pinmux_tristate_disable(PMUX_PINGRP_ATD);
30 
31 	/* For power GPIO PT3 */
32 	pinmux_tristate_disable(PMUX_PINGRP_DTB);
33 	/* For CD GPIO PI5 */
34 	pinmux_tristate_disable(PMUX_PINGRP_ATC);
35 }
36 #endif
37 
38 void pin_mux_usb(void)
39 {
40 	funcmux_select(PERIPH_ID_USB2, FUNCMUX_USB2_ULPI);
41 	pinmux_set_func(PMUX_PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4);
42 	pinmux_tristate_disable(PMUX_PINGRP_CDEV2);
43 	/* USB2 PHY reset GPIO */
44 	pinmux_tristate_disable(PMUX_PINGRP_UAC);
45 }
46 
47 void pin_mux_display(void)
48 {
49 	pinmux_set_func(PMUX_PINGRP_SDC, PMUX_FUNC_PWM);
50 	pinmux_tristate_disable(PMUX_PINGRP_SDC);
51 }
52