1f4ef6668STom Warren /* 2f4ef6668STom Warren * (C) Copyright 2010,2011 3f4ef6668STom Warren * NVIDIA Corporation <www.nvidia.com> 4f4ef6668STom Warren * 5f4ef6668STom Warren * See file CREDITS for list of people who contributed to this 6f4ef6668STom Warren * project. 7f4ef6668STom Warren * 8f4ef6668STom Warren * This program is free software; you can redistribute it and/or 9f4ef6668STom Warren * modify it under the terms of the GNU General Public License as 10f4ef6668STom Warren * published by the Free Software Foundation; either version 2 of 11f4ef6668STom Warren * the License, or (at your option) any later version. 12f4ef6668STom Warren * 13f4ef6668STom Warren * This program is distributed in the hope that it will be useful, 14f4ef6668STom Warren * but WITHOUT ANY WARRANTY; without even the implied warranty of 15f4ef6668STom Warren * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16f4ef6668STom Warren * GNU General Public License for more details. 17f4ef6668STom Warren * 18f4ef6668STom Warren * You should have received a copy of the GNU General Public License 19f4ef6668STom Warren * along with this program; if not, write to the Free Software 20f4ef6668STom Warren * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21f4ef6668STom Warren * MA 02111-1307 USA 22f4ef6668STom Warren */ 23f4ef6668STom Warren 24f4ef6668STom Warren #include <common.h> 25f4ef6668STom Warren #include <asm/io.h> 26f4ef6668STom Warren #include <asm/arch/tegra2.h> 27ae03661fSStephen Warren #include <asm/arch/pinmux.h> 28*977a39e6SThierry Reding #include <asm/arch/mmc.h> 299877841fSStephen Warren #include <asm/gpio.h> 30ccf7988bSTom Warren #ifdef CONFIG_TEGRA2_MMC 31ccf7988bSTom Warren #include <mmc.h> 32ccf7988bSTom Warren #endif 33f4ef6668STom Warren 34f4ef6668STom Warren /* 35f4ef6668STom Warren * Routine: gpio_config_uart 36f4ef6668STom Warren * Description: Does nothing on Harmony - no conflict w/SPI. 37f4ef6668STom Warren */ 38f4ef6668STom Warren void gpio_config_uart(void) 39f4ef6668STom Warren { 40f4ef6668STom Warren } 41ccf7988bSTom Warren 42ccf7988bSTom Warren #ifdef CONFIG_TEGRA2_MMC 43ccf7988bSTom Warren /* 44ae03661fSStephen Warren * Routine: pin_mux_mmc 45ae03661fSStephen Warren * Description: setup the pin muxes/tristate values for the SDMMC(s) 46ae03661fSStephen Warren */ 47ae03661fSStephen Warren static void pin_mux_mmc(void) 48ae03661fSStephen Warren { 49ae03661fSStephen Warren /* SDMMC4: config 3, x8 on 2nd set of pins */ 50ae03661fSStephen Warren pinmux_set_func(PINGRP_ATB, PMUX_FUNC_SDIO4); 51ae03661fSStephen Warren pinmux_set_func(PINGRP_GMA, PMUX_FUNC_SDIO4); 52ae03661fSStephen Warren pinmux_set_func(PINGRP_GME, PMUX_FUNC_SDIO4); 53ae03661fSStephen Warren 54ae03661fSStephen Warren pinmux_tristate_disable(PINGRP_ATB); 55ae03661fSStephen Warren pinmux_tristate_disable(PINGRP_GMA); 56ae03661fSStephen Warren pinmux_tristate_disable(PINGRP_GME); 57ae03661fSStephen Warren 58ae03661fSStephen Warren /* For power GPIO PI6 */ 59ae03661fSStephen Warren pinmux_tristate_disable(PINGRP_ATA); 60ae03661fSStephen Warren /* For CD GPIO PH2 */ 61ae03661fSStephen Warren pinmux_tristate_disable(PINGRP_ATD); 62ae03661fSStephen Warren 63ae03661fSStephen Warren /* SDMMC2: SDIO2_CLK, SDIO2_CMD, SDIO2_DAT[7:0] */ 64ae03661fSStephen Warren pinmux_set_func(PINGRP_DTA, PMUX_FUNC_SDIO2); 65ae03661fSStephen Warren pinmux_set_func(PINGRP_DTD, PMUX_FUNC_SDIO2); 66ae03661fSStephen Warren 67ae03661fSStephen Warren pinmux_tristate_disable(PINGRP_DTA); 68ae03661fSStephen Warren pinmux_tristate_disable(PINGRP_DTD); 69ae03661fSStephen Warren 70ae03661fSStephen Warren /* For power GPIO PT3 */ 71ae03661fSStephen Warren pinmux_tristate_disable(PINGRP_DTB); 72ae03661fSStephen Warren /* For CD GPIO PI5 */ 73ae03661fSStephen Warren pinmux_tristate_disable(PINGRP_ATC); 74ae03661fSStephen Warren } 75ae03661fSStephen Warren 76ccf7988bSTom Warren /* this is a weak define that we are overriding */ 77ae03661fSStephen Warren int board_mmc_init(bd_t *bd) 78ae03661fSStephen Warren { 79ae03661fSStephen Warren debug("board_mmc_init called\n"); 80ae03661fSStephen Warren 81ae03661fSStephen Warren /* Enable muxes, etc. for SDMMC controllers */ 82ae03661fSStephen Warren pin_mux_mmc(); 83ae03661fSStephen Warren 84ae03661fSStephen Warren debug("board_mmc_init: init SD slot J26\n"); 85ae03661fSStephen Warren /* init dev 0, SD slot J26, with 4-bit bus */ 86ae03661fSStephen Warren /* The board has an 8-bit bus, but 8-bit doesn't work yet */ 879877841fSStephen Warren tegra2_mmc_init(0, 4, GPIO_PI6, GPIO_PH2); 88ae03661fSStephen Warren 89ae03661fSStephen Warren debug("board_mmc_init: init SD slot J5\n"); 90ae03661fSStephen Warren /* init dev 2, SD slot J5, with 4-bit bus */ 919877841fSStephen Warren tegra2_mmc_init(2, 4, GPIO_PT3, GPIO_PI5); 92ae03661fSStephen Warren 93ae03661fSStephen Warren return 0; 94ae03661fSStephen Warren } 95ccf7988bSTom Warren #endif 96