xref: /openbmc/u-boot/board/nvidia/harmony/harmony.c (revision 70ad375e)
1f4ef6668STom Warren /*
2f4ef6668STom Warren  *  (C) Copyright 2010,2011
3f4ef6668STom Warren  *  NVIDIA Corporation <www.nvidia.com>
4f4ef6668STom Warren  *
51a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
6f4ef6668STom Warren  */
7f4ef6668STom Warren 
8f4ef6668STom Warren #include <common.h>
9b46694dfSStephen Warren #include <lcd.h>
10f4ef6668STom Warren #include <asm/io.h>
11e712e545SSimon Glass #include <asm/arch/clock.h>
12e712e545SSimon Glass #include <asm/arch/funcmux.h>
13ae03661fSStephen Warren #include <asm/arch/pinmux.h>
14150c2493STom Warren #include <asm/arch/tegra.h>
159877841fSStephen Warren #include <asm/gpio.h>
16ccf7988bSTom Warren 
173f82d89dSTom Warren #ifdef CONFIG_TEGRA_MMC
18ccf7988bSTom Warren /*
19ae03661fSStephen Warren  * Routine: pin_mux_mmc
20ae03661fSStephen Warren  * Description: setup the pin muxes/tristate values for the SDMMC(s)
21ae03661fSStephen Warren  */
22c9aa831eSTom Warren void pin_mux_mmc(void)
23ae03661fSStephen Warren {
24e712e545SSimon Glass 	funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT);
25e712e545SSimon Glass 	funcmux_select(PERIPH_ID_SDMMC2, FUNCMUX_SDMMC2_DTA_DTD_8BIT);
26ae03661fSStephen Warren 
27ae03661fSStephen Warren 	/* For power GPIO PI6 */
28*70ad375eSStephen Warren 	pinmux_tristate_disable(PMUX_PINGRP_ATA);
29ae03661fSStephen Warren 	/* For CD GPIO PH2 */
30*70ad375eSStephen Warren 	pinmux_tristate_disable(PMUX_PINGRP_ATD);
31ae03661fSStephen Warren 
32ae03661fSStephen Warren 	/* For power GPIO PT3 */
33*70ad375eSStephen Warren 	pinmux_tristate_disable(PMUX_PINGRP_DTB);
34ae03661fSStephen Warren 	/* For CD GPIO PI5 */
35*70ad375eSStephen Warren 	pinmux_tristate_disable(PMUX_PINGRP_ATC);
36ae03661fSStephen Warren }
37ccf7988bSTom Warren #endif
38699c40e8SStephen Warren 
39699c40e8SStephen Warren void pin_mux_usb(void)
40699c40e8SStephen Warren {
41699c40e8SStephen Warren 	funcmux_select(PERIPH_ID_USB2, FUNCMUX_USB2_ULPI);
42*70ad375eSStephen Warren 	pinmux_set_func(PMUX_PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4);
43*70ad375eSStephen Warren 	pinmux_tristate_disable(PMUX_PINGRP_CDEV2);
44699c40e8SStephen Warren 	/* USB2 PHY reset GPIO */
45*70ad375eSStephen Warren 	pinmux_tristate_disable(PMUX_PINGRP_UAC);
46699c40e8SStephen Warren }
47b46694dfSStephen Warren 
48b46694dfSStephen Warren void pin_mux_display(void)
49b46694dfSStephen Warren {
50*70ad375eSStephen Warren 	pinmux_set_func(PMUX_PINGRP_SDC, PMUX_FUNC_PWM);
51*70ad375eSStephen Warren 	pinmux_tristate_disable(PMUX_PINGRP_SDC);
52b46694dfSStephen Warren }
53