1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+ 2f4ef6668STom Warren /* 3f4ef6668STom Warren * (C) Copyright 2010,2011 4f4ef6668STom Warren * NVIDIA Corporation <www.nvidia.com> 5f4ef6668STom Warren */ 6f4ef6668STom Warren 7f4ef6668STom Warren #include <common.h> 8b46694dfSStephen Warren #include <lcd.h> 9f4ef6668STom Warren #include <asm/io.h> 10e712e545SSimon Glass #include <asm/arch/clock.h> 11e712e545SSimon Glass #include <asm/arch/funcmux.h> 12ae03661fSStephen Warren #include <asm/arch/pinmux.h> 13150c2493STom Warren #include <asm/arch/tegra.h> 149877841fSStephen Warren #include <asm/gpio.h> 15ccf7988bSTom Warren 161d2c0506SMasahiro Yamada #ifdef CONFIG_MMC_SDHCI_TEGRA 17ccf7988bSTom Warren /* 18ae03661fSStephen Warren * Routine: pin_mux_mmc 19ae03661fSStephen Warren * Description: setup the pin muxes/tristate values for the SDMMC(s) 20ae03661fSStephen Warren */ pin_mux_mmc(void)21c9aa831eSTom Warrenvoid pin_mux_mmc(void) 22ae03661fSStephen Warren { 23e712e545SSimon Glass funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT); 24e712e545SSimon Glass funcmux_select(PERIPH_ID_SDMMC2, FUNCMUX_SDMMC2_DTA_DTD_8BIT); 25ae03661fSStephen Warren 26ae03661fSStephen Warren /* For power GPIO PI6 */ 2770ad375eSStephen Warren pinmux_tristate_disable(PMUX_PINGRP_ATA); 28ae03661fSStephen Warren /* For CD GPIO PH2 */ 2970ad375eSStephen Warren pinmux_tristate_disable(PMUX_PINGRP_ATD); 30ae03661fSStephen Warren 31ae03661fSStephen Warren /* For power GPIO PT3 */ 3270ad375eSStephen Warren pinmux_tristate_disable(PMUX_PINGRP_DTB); 33ae03661fSStephen Warren /* For CD GPIO PI5 */ 3470ad375eSStephen Warren pinmux_tristate_disable(PMUX_PINGRP_ATC); 35ae03661fSStephen Warren } 36ccf7988bSTom Warren #endif 37699c40e8SStephen Warren pin_mux_usb(void)38699c40e8SStephen Warrenvoid pin_mux_usb(void) 39699c40e8SStephen Warren { 40699c40e8SStephen Warren funcmux_select(PERIPH_ID_USB2, FUNCMUX_USB2_ULPI); 4170ad375eSStephen Warren pinmux_set_func(PMUX_PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4); 4270ad375eSStephen Warren pinmux_tristate_disable(PMUX_PINGRP_CDEV2); 43699c40e8SStephen Warren /* USB2 PHY reset GPIO */ 4470ad375eSStephen Warren pinmux_tristate_disable(PMUX_PINGRP_UAC); 45699c40e8SStephen Warren } 46b46694dfSStephen Warren pin_mux_display(void)47b46694dfSStephen Warrenvoid pin_mux_display(void) 48b46694dfSStephen Warren { 4970ad375eSStephen Warren pinmux_set_func(PMUX_PINGRP_SDC, PMUX_FUNC_PWM); 5070ad375eSStephen Warren pinmux_tristate_disable(PMUX_PINGRP_SDC); 51b46694dfSStephen Warren } 52