1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+ 2b6920095SStephen Warren /* 3b6920095SStephen Warren * (C) Copyright 2013-2015 4b6920095SStephen Warren * NVIDIA Corporation <www.nvidia.com> 5b6920095SStephen Warren */ 6b6920095SStephen Warren 7b6920095SStephen Warren #include <common.h> 8b6920095SStephen Warren #include <i2c.h> 9b6920095SStephen Warren #include <asm/arch/gpio.h> 10b6920095SStephen Warren #include <asm/arch/pinmux.h> 11b6920095SStephen Warren #include "../p2571/max77620_init.h" 12b6920095SStephen Warren #include "pinmux-config-e2220-1170.h" 13b6920095SStephen Warren 14b6920095SStephen Warren void pin_mux_mmc(void) 15b6920095SStephen Warren { 16b6920095SStephen Warren struct udevice *dev; 17b6920095SStephen Warren uchar val; 18b6920095SStephen Warren int ret; 19b6920095SStephen Warren 20b6920095SStephen Warren /* Turn on MAX77620 LDO2 to 3.3V for SD card power */ 21b6920095SStephen Warren debug("%s: Set LDO2 for VDDIO_SDMMC_AP power to 3.3V\n", __func__); 22b6920095SStephen Warren ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); 23b6920095SStephen Warren if (ret) { 24b6920095SStephen Warren printf("%s: Cannot find MAX77620 I2C chip\n", __func__); 25b6920095SStephen Warren return; 26b6920095SStephen Warren } 27b6920095SStephen Warren /* 0xF2 for 3.3v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ 28b6920095SStephen Warren val = 0xF2; 29b6920095SStephen Warren ret = dm_i2c_write(dev, MAX77620_CNFG1_L2_REG, &val, 1); 30b6920095SStephen Warren if (ret) 31b6920095SStephen Warren printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret); 32b6920095SStephen Warren } 33b6920095SStephen Warren 34b6920095SStephen Warren /* 35b6920095SStephen Warren * Routine: pinmux_init 36b6920095SStephen Warren * Description: Do individual peripheral pinmux configs 37b6920095SStephen Warren */ 38b6920095SStephen Warren void pinmux_init(void) 39b6920095SStephen Warren { 40b6920095SStephen Warren pinmux_clear_tristate_input_clamping(); 41b6920095SStephen Warren 42b6920095SStephen Warren gpio_config_table(e2220_1170_gpio_inits, 43b6920095SStephen Warren ARRAY_SIZE(e2220_1170_gpio_inits)); 44b6920095SStephen Warren 45b6920095SStephen Warren pinmux_config_pingrp_table(e2220_1170_pingrps, 46b6920095SStephen Warren ARRAY_SIZE(e2220_1170_pingrps)); 47b6920095SStephen Warren 48b6920095SStephen Warren pinmux_config_drvgrp_table(e2220_1170_drvgrps, 49b6920095SStephen Warren ARRAY_SIZE(e2220_1170_drvgrps)); 50b6920095SStephen Warren } 51