1/* 2 * (C) Copyright 2007 3 * Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8#include <asm/macro.h> 9 10 .global lowlevel_init 11 12 .text 13 .align 2 14 15lowlevel_init: 16 17 write16 WTCSR_A, WTCSR_D 18 19 write16 WTCNT_A, WTCNT_D 20 21 write16 FRQCR_A, FRQCR_D 22 23 write16 UCLKCR_A, UCLKCR_D 24 25 write32 CMNCR_A, CMNCR_D 26 27 write32 CMNCR_A, CMNCR_D 28 29 write32 CS0BCR_A, CS0BCR_D 30 31 write32 CS2BCR_A, CS2BCR_D 32 33 write32 CS3BCR_A, CS3BCR_D 34 35 write32 CS4BCR_A, CS4BCR_D 36 37 write32 CS5ABCR_A, CS5ABCR_D 38 39 write32 CS5BBCR_A, CS5BBCR_D 40 41 write32 CS6ABCR_A, CS6ABCR_D 42 43 write32 CS6BBCR_A, CS6BBCR_D 44 45 write32 CS0WCR_A, CS0WCR_D 46 47 write32 CS2WCR_A, CS2WCR_D 48 49 write32 CS3WCR_A, CS3WCR_D 50 51 write32 CS4WCR_A, CS4WCR_D 52 53 write32 CS5AWCR_A, CS5AWCR_D 54 55 write32 CS5BWCR_A, CS5BWCR_D 56 57 write32 CS6AWCR_A, CS6AWCR_D 58 59 write32 CS6BWCR_A, CS6BWCR_D 60 61 write32 SDCR_A, SDCR_D1 62 63 write32 RTCSR_A, RTCSR_D 64 65 write32 RTCNT_A RTCNT_D 66 67 write32 RTCOR_A, RTCOR_D 68 69 write32 SDCR_A, SDCR_D2 70 71 write16 SDMR3_A, SDMR3_D 72 73 write16 PCCR_A, PCCR_D 74 75 write16 PDCR_A, PDCR_D 76 77 write16 PECR_A, PECR_D 78 79 write16 PGCR_A, PGCR_D 80 81 write16 PHCR_A, PHCR_D 82 83 write16 PPCR_A, PPCR_D 84 85 write16 PTCR_A, PTCR_D 86 87 write16 PVCR_A, PVCR_D 88 89 write16 PSELA_A, PSELA_D 90 91 write32 CCR_A, CCR_D 92 93 write8 LED_A, LED_D 94 95 rts 96 nop 97 98 .align 4 99 100FRQCR_A: .long 0xA415FF80 /* FRQCR Address */ 101WTCNT_A: .long 0xA415FF84 102WTCSR_A: .long 0xA415FF86 103UCLKCR_A: .long 0xA40A0008 104FRQCR_D: .word 0x1103 /* I:B:P=8:4:2 */ 105WTCNT_D: .word 0x5A00 106WTCSR_D: .word 0xA506 107UCLKCR_D: .word 0xA5C0 108 109#define BSC_BASE 0xA4FD0000 110CMNCR_A: .long BSC_BASE 111CS0BCR_A: .long BSC_BASE + 0x04 112CS2BCR_A: .long BSC_BASE + 0x08 113CS3BCR_A: .long BSC_BASE + 0x0C 114CS4BCR_A: .long BSC_BASE + 0x10 115CS5ABCR_A: .long BSC_BASE + 0x14 116CS5BBCR_A: .long BSC_BASE + 0x18 117CS6ABCR_A: .long BSC_BASE + 0x1C 118CS6BBCR_A: .long BSC_BASE + 0x20 119CS0WCR_A: .long BSC_BASE + 0x24 120CS2WCR_A: .long BSC_BASE + 0x28 121CS3WCR_A: .long BSC_BASE + 0x2C 122CS4WCR_A: .long BSC_BASE + 0x30 123CS5AWCR_A: .long BSC_BASE + 0x34 124CS5BWCR_A: .long BSC_BASE + 0x38 125CS6AWCR_A: .long BSC_BASE + 0x3C 126CS6BWCR_A: .long BSC_BASE + 0x40 127SDCR_A: .long BSC_BASE + 0x44 128RTCSR_A: .long BSC_BASE + 0x48 129RTCNT_A: .long BSC_BASE + 0x4C 130RTCOR_A: .long BSC_BASE + 0x50 131SDMR3_A: .long BSC_BASE + 0x58C0 132 133CMNCR_D: .long 0x00000010 134CS0BCR_D: .long 0x36DB0400 135CS2BCR_D: .long 0x36DB0400 136CS3BCR_D: .long 0x36DB4600 137CS4BCR_D: .long 0x36DB0400 138CS5ABCR_D: .long 0x36DB0400 139CS5BBCR_D: .long 0x36DB0200 140CS6ABCR_D: .long 0x36DB0400 141CS6BBCR_D: .long 0x36DB0400 142CS0WCR_D: .long 0x00000B01 143CS2WCR_D: .long 0x00000500 144CS3WCR_D: .long 0x00006D1B 145CS4WCR_D: .long 0x00000500 146CS5AWCR_D: .long 0x00000500 147CS5BWCR_D: .long 0x00000500 148CS6AWCR_D: .long 0x00000500 149CS6BWCR_D: .long 0x00000500 150SDCR_D1: .long 0x00000011 151RTCSR_D: .long 0xA55A0010 152RTCNT_D: .long 0xA55A001F 153RTCOR_D: .long 0xA55A001F 154SDMR3_D: .word 0x0000 155.align 2 156SDCR_D2: .long 0x00000811 157 158#define PFC_BASE 0xA4050100 159PCCR_A: .long PFC_BASE + 0x04 160PDCR_A: .long PFC_BASE + 0x06 161PECR_A: .long PFC_BASE + 0x08 162PGCR_A: .long PFC_BASE + 0x0C 163PHCR_A: .long PFC_BASE + 0x0E 164PPCR_A: .long PFC_BASE + 0x18 165PTCR_A: .long PFC_BASE + 0x1E 166PVCR_A: .long PFC_BASE + 0x22 167PSELA_A: .long PFC_BASE + 0x24 168 169PCCR_D: .word 0x0000 170PDCR_D: .word 0x0000 171PECR_D: .word 0x0000 172PGCR_D: .word 0x0000 173PHCR_D: .word 0x0000 174PPCR_D: .word 0x00AA 175PTCR_D: .word 0x0280 176PVCR_D: .word 0x0000 177PSELA_D: .word 0x0000 178.align 2 179 180CCR_A: .long 0xFFFFFFEC 181!CCR_D: .long 0x0000000D 182CCR_D: .long 0x0000000B 183 184LED_A: .long 0xB6800000 185LED_D: .long 0xFF 186