xref: /openbmc/u-boot/board/micronas/vct/vct.c (revision d66ff4ba)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering
4  *
5  * Copyright (C) 2006 Micronas GmbH
6  */
7 
8 #include <common.h>
9 #include <command.h>
10 #include <netdev.h>
11 #include <asm/mipsregs.h>
12 #include "vct.h"
13 
14 #if defined(CONFIG_VCT_PREMIUM)
15 #define BOARD_NAME	"PremiumD"
16 #elif defined(CONFIG_VCT_PLATINUM)
17 #define BOARD_NAME	"PlatinumD"
18 #elif defined(CONFIG_VCT_PLATINUMAVC)
19 #define BOARD_NAME	"PlatinumAVC"
20 #else
21 #error "vct: No board variant defined!"
22 #endif
23 
24 #if defined(CONFIG_VCT_ONENAND)
25 #define BOARD_NAME_ADD	" OneNAND"
26 #else
27 #define BOARD_NAME_ADD	" NOR"
28 #endif
29 
30 DECLARE_GLOBAL_DATA_PTR;
31 
32 int board_early_init_f(void)
33 {
34 	/*
35 	 * First initialize the PIN mulitplexing
36 	 */
37 	vct_pin_mux_initialize();
38 
39 	/*
40 	 * Init the EBI very early so that FLASH can be accessed
41 	 */
42 	ebi_initialize();
43 
44 	return 0;
45 }
46 
47 void _machine_restart(void)
48 {
49 	reg_write(DCGU_EN_WDT_RESET(DCGU_BASE), DCGU_MAGIC_WDT);
50 	reg_write(WDT_TORR(WDT_BASE), 0x00);
51 	reg_write(WDT_CR(WDT_BASE), 0x1D);
52 
53 	/*
54 	 * Now wait for the watchdog to trigger the reset
55 	 */
56 	udelay(1000000);
57 }
58 
59 /*
60  * SDRAM is already configured by the bootstrap code, only return the
61  * auto-detected size here
62  */
63 int dram_init(void)
64 {
65 	gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
66 			    CONFIG_SYS_MBYTES_SDRAM << 20);
67 
68 	return 0;
69 }
70 
71 int checkboard(void)
72 {
73 	char buf[64];
74 	int i = env_get_f("serial#", buf, sizeof(buf));
75 	u32 config0 = read_c0_prid();
76 
77 	if ((config0 & 0xff0000) == PRID_COMP_LEGACY
78 	    && (config0 & 0xff00) == PRID_IMP_LX4280) {
79 		puts("Board: MDED \n");
80 		printf("CPU:   LX4280 id: 0x%02x, rev: 0x%02x\n",
81 		       (config0 >> 8) & 0xFF, config0 & 0xFF);
82 	} else if ((config0 & 0xff0000) == PRID_COMP_MIPS
83 		   && (config0 & 0xff00) == PRID_IMP_VGC) {
84 		u32 jedec_id = *((u32 *) 0xBEBC71A0);
85 		if ((((jedec_id) >> 12) & 0xFF) == 0x40) {
86 			puts("Board: VGCA \n");
87 		} else if ((((jedec_id) >> 12) & 0xFF) == 0x48
88 			   || (((jedec_id) >> 12) & 0xFF) == 0x49) {
89 			puts("Board: VGCB \n");
90 		}
91 		printf("CPU:   MIPS 4K id: 0x%02x, rev: 0x%02x\n",
92 		       (config0 >> 8) & 0xFF, config0 & 0xFF);
93 	} else if (config0 == 0x19378) {
94 		printf("CPU:   MIPS 24K id: 0x%02x, rev: 0x%02x\n",
95 		       (config0 >> 8) & 0xFF, config0 & 0xFF);
96 	} else {
97 		printf("Unsupported cpu %d, proc_id=0x%x\n", config0 >> 24,
98 		       config0);
99 	}
100 
101 	printf("Board: Micronas VCT " BOARD_NAME BOARD_NAME_ADD);
102 	if (i > 0) {
103 		puts(", serial# ");
104 		puts(buf);
105 	}
106 	putc('\n');
107 
108 	return 0;
109 }
110 
111 int board_eth_init(bd_t *bis)
112 {
113 	int rc = 0;
114 #ifdef CONFIG_SMC911X
115 	rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
116 #endif
117 	return rc;
118 }
119