xref: /openbmc/u-boot/board/micronas/vct/vct.c (revision cf0bcd7d)
1 /*
2  * (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering
3  *
4  * Copyright (C) 2006 Micronas GmbH
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #include <common.h>
10 #include <command.h>
11 #include <netdev.h>
12 #include <asm/mipsregs.h>
13 #include "vct.h"
14 
15 #if defined(CONFIG_VCT_PREMIUM)
16 #define BOARD_NAME	"PremiumD"
17 #elif defined(CONFIG_VCT_PLATINUM)
18 #define BOARD_NAME	"PlatinumD"
19 #elif defined(CONFIG_VCT_PLATINUMAVC)
20 #define BOARD_NAME	"PlatinumAVC"
21 #else
22 #error "vct: No board variant defined!"
23 #endif
24 
25 #if defined(CONFIG_VCT_ONENAND)
26 #define BOARD_NAME_ADD	" OneNAND"
27 #else
28 #define BOARD_NAME_ADD	" NOR"
29 #endif
30 
31 DECLARE_GLOBAL_DATA_PTR;
32 
33 int board_early_init_f(void)
34 {
35 	/*
36 	 * First initialize the PIN mulitplexing
37 	 */
38 	vct_pin_mux_initialize();
39 
40 	/*
41 	 * Init the EBI very early so that FLASH can be accessed
42 	 */
43 	ebi_initialize();
44 
45 	return 0;
46 }
47 
48 void _machine_restart(void)
49 {
50 	reg_write(DCGU_EN_WDT_RESET(DCGU_BASE), DCGU_MAGIC_WDT);
51 	reg_write(WDT_TORR(WDT_BASE), 0x00);
52 	reg_write(WDT_CR(WDT_BASE), 0x1D);
53 
54 	/*
55 	 * Now wait for the watchdog to trigger the reset
56 	 */
57 	udelay(1000000);
58 }
59 
60 /*
61  * SDRAM is already configured by the bootstrap code, only return the
62  * auto-detected size here
63  */
64 int dram_init(void)
65 {
66 	gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
67 			    CONFIG_SYS_MBYTES_SDRAM << 20);
68 
69 	return 0;
70 }
71 
72 int checkboard(void)
73 {
74 	char buf[64];
75 	int i = env_get_f("serial#", buf, sizeof(buf));
76 	u32 config0 = read_c0_prid();
77 
78 	if ((config0 & 0xff0000) == PRID_COMP_LEGACY
79 	    && (config0 & 0xff00) == PRID_IMP_LX4280) {
80 		puts("Board: MDED \n");
81 		printf("CPU:   LX4280 id: 0x%02x, rev: 0x%02x\n",
82 		       (config0 >> 8) & 0xFF, config0 & 0xFF);
83 	} else if ((config0 & 0xff0000) == PRID_COMP_MIPS
84 		   && (config0 & 0xff00) == PRID_IMP_VGC) {
85 		u32 jedec_id = *((u32 *) 0xBEBC71A0);
86 		if ((((jedec_id) >> 12) & 0xFF) == 0x40) {
87 			puts("Board: VGCA \n");
88 		} else if ((((jedec_id) >> 12) & 0xFF) == 0x48
89 			   || (((jedec_id) >> 12) & 0xFF) == 0x49) {
90 			puts("Board: VGCB \n");
91 		}
92 		printf("CPU:   MIPS 4K id: 0x%02x, rev: 0x%02x\n",
93 		       (config0 >> 8) & 0xFF, config0 & 0xFF);
94 	} else if (config0 == 0x19378) {
95 		printf("CPU:   MIPS 24K id: 0x%02x, rev: 0x%02x\n",
96 		       (config0 >> 8) & 0xFF, config0 & 0xFF);
97 	} else {
98 		printf("Unsupported cpu %d, proc_id=0x%x\n", config0 >> 24,
99 		       config0);
100 	}
101 
102 	printf("Board: Micronas VCT " BOARD_NAME BOARD_NAME_ADD);
103 	if (i > 0) {
104 		puts(", serial# ");
105 		puts(buf);
106 	}
107 	putc('\n');
108 
109 	return 0;
110 }
111 
112 int board_eth_init(bd_t *bis)
113 {
114 	int rc = 0;
115 #ifdef CONFIG_SMC911X
116 	rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
117 #endif
118 	return rc;
119 }
120