1 /* 2 * (C) Copyright 2009 Stefan Roese <sr@denx.de>, DENX Software Engineering 3 * 4 * Original Author Guenter Gebhardt 5 * Copyright (C) 2006 Micronas GmbH 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License as 9 * published by the Free Software Foundation; either version 2 of 10 * the License, or (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 20 * MA 02111-1307 USA 21 */ 22 23 #include <common.h> 24 25 #include "vct.h" 26 27 int vct_ehci_hcd_init(u32 *hccr, u32 *hcor) 28 { 29 int retval; 30 u32 val; 31 u32 addr; 32 33 dcgu_set_reset_switch(DCGU_HW_MODULE_USB_24, DCGU_SWITCH_ON); 34 dcgu_set_reset_switch(DCGU_HW_MODULE_USB_60, DCGU_SWITCH_ON); 35 dcgu_set_clk_switch(DCGU_HW_MODULE_USB_24, DCGU_SWITCH_ON); 36 dcgu_set_clk_switch(DCGU_HW_MODULE_USB_PLL, DCGU_SWITCH_ON); 37 dcgu_set_reset_switch(DCGU_HW_MODULE_USB_24, DCGU_SWITCH_OFF); 38 39 /* Wait until (DCGU_USBPHY_STAT == 7) */ 40 addr = DCGU_USBPHY_STAT(DCGU_BASE); 41 val = reg_read(addr); 42 while (val != 7) 43 val = reg_read(addr); 44 45 dcgu_set_clk_switch(DCGU_HW_MODULE_USB_60, DCGU_SWITCH_ON); 46 dcgu_set_reset_switch(DCGU_HW_MODULE_USB_60, DCGU_SWITCH_OFF); 47 48 retval = scc_reset(SCC_USB_RW, 0); 49 if (retval) { 50 printf("scc_reset(SCC_USB_RW, 0) returned: 0x%x\n", retval); 51 return retval; 52 } else { 53 retval = scc_reset(SCC_CPU1_SPDMA_RW, 0); 54 if (retval) { 55 printf("scc_reset(SCC_CPU1_SPDMA_RW, 0) returned: 0x%x\n", 56 retval); 57 return retval; 58 } 59 } 60 61 if (!retval) { 62 /* 63 * For the AGU bypass, where the SCC client provides full 64 * physical address 65 */ 66 scc_set_usb_address_generation_mode(1); 67 scc_setup_dma(SCC_USB_RW, BCU_USB_BUFFER_1, DMA_LINEAR, 68 USE_NO_FH, DMA_READ, 0); 69 scc_setup_dma(SCC_CPU1_SPDMA_RW, BCU_USB_BUFFER_1, DMA_LINEAR, 70 USE_NO_FH, DMA_WRITE, 0); 71 scc_setup_dma(SCC_USB_RW, BCU_USB_BUFFER_0, DMA_LINEAR, 72 USE_NO_FH, DMA_WRITE, 0); 73 scc_setup_dma(SCC_CPU1_SPDMA_RW, BCU_USB_BUFFER_0, DMA_LINEAR, 74 USE_NO_FH, DMA_READ, 0); 75 76 /* Enable memory interface */ 77 scc_enable(SCC_USB_RW, 1); 78 79 /* Start (start_cmd=0) DMAs */ 80 scc_dma_cmd(SCC_USB_RW, DMA_START, 0, DMA_READ); 81 scc_dma_cmd(SCC_USB_RW, DMA_START, 0, DMA_WRITE); 82 } else { 83 printf("Cannot configure USB memory channel.\n"); 84 printf("USB can not access RAM. SCC configuration failed.\n"); 85 return retval; 86 } 87 88 /* Wait a short while */ 89 udelay(300000); 90 91 reg_write(USBH_BURSTSIZE(USBH_BASE), 0x00001c1c); 92 93 /* Set EHCI structures and DATA in RAM */ 94 reg_write(USBH_USBHMISC(USBH_BASE), 0x00840003); 95 /* Set USBMODE to bigendian and set host mode */ 96 reg_write(USBH_USBMODE(USBH_BASE), 0x00000007); 97 98 /* 99 * USBH_BURSTSIZE MUST EQUAL 0x00001c1c in order for 100 * 512 byte USB transfers on the bulk pipe to work properly. 101 * Set USBH_BURSTSIZE to 0x00001c1c 102 */ 103 reg_write(USBH_BURSTSIZE(USBH_BASE), 0x00001c1c); 104 105 /* Insert access register addresses */ 106 *hccr = REG_GLOBAL_START_ADDR + USBH_CAPLENGTH(USBH_BASE); 107 *hcor = REG_GLOBAL_START_ADDR + USBH_USBCMD(USBH_BASE); 108 109 return 0; 110 } 111