186887f8eSPeter Barada /* 286887f8eSPeter Barada * (C) Copyright 2011 386887f8eSPeter Barada * Logic Product Development <www.logicpd.com> 486887f8eSPeter Barada * 586887f8eSPeter Barada * Author : 686887f8eSPeter Barada * Peter Barada <peter.barada@logicpd.com> 786887f8eSPeter Barada * 886887f8eSPeter Barada * Derived from Beagle Board and 3430 SDP code by 986887f8eSPeter Barada * Richard Woodruff <r-woodruff2@ti.com> 1086887f8eSPeter Barada * Syed Mohammed Khasim <khasim@ti.com> 1186887f8eSPeter Barada * 121a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 1386887f8eSPeter Barada */ 1486887f8eSPeter Barada #include <common.h> 157b77b1f6SAdam Ford #include <dm.h> 167b77b1f6SAdam Ford #include <ns16550.h> 1786887f8eSPeter Barada #include <netdev.h> 1886887f8eSPeter Barada #include <flash.h> 1986887f8eSPeter Barada #include <nand.h> 2086887f8eSPeter Barada #include <i2c.h> 2186887f8eSPeter Barada #include <twl4030.h> 2286887f8eSPeter Barada #include <asm/io.h> 2386887f8eSPeter Barada #include <asm/arch/mmc_host_def.h> 2486887f8eSPeter Barada #include <asm/arch/mux.h> 2586887f8eSPeter Barada #include <asm/arch/mem.h> 2686887f8eSPeter Barada #include <asm/arch/sys_proto.h> 2786887f8eSPeter Barada #include <asm/gpio.h> 2886887f8eSPeter Barada #include <asm/mach-types.h> 2986887f8eSPeter Barada #include "omap3logic.h" 3086887f8eSPeter Barada 3186887f8eSPeter Barada DECLARE_GLOBAL_DATA_PTR; 3286887f8eSPeter Barada 3386887f8eSPeter Barada /* 3486887f8eSPeter Barada * two dimensional array of strucures containining board name and Linux 3586887f8eSPeter Barada * machine IDs; row it selected based on CPU column is slected based 3686887f8eSPeter Barada * on hsusb0_data5 pin having a pulldown resistor 3786887f8eSPeter Barada */ 387b77b1f6SAdam Ford 397b77b1f6SAdam Ford static const struct ns16550_platdata omap3logic_serial = { 407b77b1f6SAdam Ford OMAP34XX_UART1, 417b77b1f6SAdam Ford 2, 427b77b1f6SAdam Ford V_NS16550_CLK 437b77b1f6SAdam Ford }; 447b77b1f6SAdam Ford 457b77b1f6SAdam Ford U_BOOT_DEVICE(omap3logic_uart) = { 46*c7b9686dSThomas Chou "ns16550_serial", 477b77b1f6SAdam Ford &omap3logic_serial 487b77b1f6SAdam Ford }; 497b77b1f6SAdam Ford 5086887f8eSPeter Barada static struct board_id { 5186887f8eSPeter Barada char *name; 5286887f8eSPeter Barada int machine_id; 5386887f8eSPeter Barada } boards[2][2] = { 5486887f8eSPeter Barada { 5586887f8eSPeter Barada { 5686887f8eSPeter Barada .name = "OMAP35xx SOM LV", 5786887f8eSPeter Barada .machine_id = MACH_TYPE_OMAP3530_LV_SOM, 5886887f8eSPeter Barada }, 5986887f8eSPeter Barada { 6086887f8eSPeter Barada .name = "OMAP35xx Torpedo", 6186887f8eSPeter Barada .machine_id = MACH_TYPE_OMAP3_TORPEDO, 6286887f8eSPeter Barada }, 6386887f8eSPeter Barada }, 6486887f8eSPeter Barada { 6586887f8eSPeter Barada { 6686887f8eSPeter Barada .name = "DM37xx SOM LV", 6786887f8eSPeter Barada .machine_id = MACH_TYPE_DM3730_SOM_LV, 6886887f8eSPeter Barada }, 6986887f8eSPeter Barada { 7086887f8eSPeter Barada .name = "DM37xx Torpedo", 7186887f8eSPeter Barada .machine_id = MACH_TYPE_DM3730_TORPEDO, 7286887f8eSPeter Barada }, 7386887f8eSPeter Barada }, 7486887f8eSPeter Barada }; 7586887f8eSPeter Barada 7686887f8eSPeter Barada /* 7786887f8eSPeter Barada * BOARD_ID_GPIO - GPIO of pin with optional pulldown resistor on SOM LV 7886887f8eSPeter Barada */ 7986887f8eSPeter Barada #define BOARD_ID_GPIO 189 /* hsusb0_data5 pin */ 8086887f8eSPeter Barada 8186887f8eSPeter Barada /* 8286887f8eSPeter Barada * Routine: board_init 8386887f8eSPeter Barada * Description: Early hardware init. 8486887f8eSPeter Barada */ 8586887f8eSPeter Barada int board_init(void) 8686887f8eSPeter Barada { 8786887f8eSPeter Barada struct board_id *board; 8886887f8eSPeter Barada unsigned int val; 8986887f8eSPeter Barada 9086887f8eSPeter Barada gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ 9186887f8eSPeter Barada 9286887f8eSPeter Barada /* boot param addr */ 9386887f8eSPeter Barada gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); 9486887f8eSPeter Barada 9586887f8eSPeter Barada /* 9686887f8eSPeter Barada * To identify between a SOM LV and Torpedo module, 9786887f8eSPeter Barada * a pulldown resistor is on hsusb0_data5 for the SOM LV module. 9886887f8eSPeter Barada * Drive the pin (and let it soak), then read it back. 9986887f8eSPeter Barada * If the pin is still high its a Torpedo. If low its a SOM LV 10086887f8eSPeter Barada */ 10186887f8eSPeter Barada 10286887f8eSPeter Barada /* Mux hsusb0_data5 as a GPIO */ 10386887f8eSPeter Barada MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M4)); 10486887f8eSPeter Barada 10586887f8eSPeter Barada if (gpio_request(BOARD_ID_GPIO, "husb0_data5.gpio_189") == 0) { 10686887f8eSPeter Barada 10786887f8eSPeter Barada /* 10886887f8eSPeter Barada * Drive BOARD_ID_GPIO - the pulldown resistor on the SOM LV 10986887f8eSPeter Barada * will drain the voltage. 11086887f8eSPeter Barada */ 11186887f8eSPeter Barada gpio_direction_output(BOARD_ID_GPIO, 0); 11286887f8eSPeter Barada gpio_set_value(BOARD_ID_GPIO, 1); 11386887f8eSPeter Barada 11486887f8eSPeter Barada /* Let it soak for a bit */ 11586887f8eSPeter Barada sdelay(0x100); 11686887f8eSPeter Barada 11786887f8eSPeter Barada /* 11886887f8eSPeter Barada * Read state of BOARD_ID_GPIO as an input and if its set. 11986887f8eSPeter Barada * If so the board is a Torpedo 12086887f8eSPeter Barada */ 12186887f8eSPeter Barada gpio_direction_input(BOARD_ID_GPIO); 12286887f8eSPeter Barada val = gpio_get_value(BOARD_ID_GPIO); 12386887f8eSPeter Barada gpio_free(BOARD_ID_GPIO); 12486887f8eSPeter Barada 12586887f8eSPeter Barada board = &boards[!!(get_cpu_family() == CPU_OMAP36XX)][!!val]; 12686887f8eSPeter Barada printf("Board: %s\n", board->name); 12786887f8eSPeter Barada 12886887f8eSPeter Barada /* Set the machine_id passed to Linux */ 12986887f8eSPeter Barada gd->bd->bi_arch_number = board->machine_id; 13086887f8eSPeter Barada } 13186887f8eSPeter Barada 13286887f8eSPeter Barada /* restore hsusb0_data5 pin as hsusb0_data5 */ 13386887f8eSPeter Barada MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M0)); 13486887f8eSPeter Barada 13586887f8eSPeter Barada return 0; 13686887f8eSPeter Barada } 13786887f8eSPeter Barada 13886887f8eSPeter Barada #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD) 13986887f8eSPeter Barada int board_mmc_init(bd_t *bis) 14086887f8eSPeter Barada { 141e3913f56SNikita Kiryanov return omap_mmc_init(0, 0, 0, -1, -1); 14286887f8eSPeter Barada } 14386887f8eSPeter Barada #endif 14486887f8eSPeter Barada 145aac5450eSPaul Kocialkowski #if defined(CONFIG_GENERIC_MMC) 146aac5450eSPaul Kocialkowski void board_mmc_power_init(void) 147aac5450eSPaul Kocialkowski { 148aac5450eSPaul Kocialkowski twl4030_power_mmc_init(0); 149aac5450eSPaul Kocialkowski } 150aac5450eSPaul Kocialkowski #endif 151aac5450eSPaul Kocialkowski 15286887f8eSPeter Barada #ifdef CONFIG_SMC911X 15386887f8eSPeter Barada /* GPMC CS1 settings for Logic SOM LV/Torpedo LAN92xx Ethernet chip */ 15486887f8eSPeter Barada static const u32 gpmc_lan92xx_config[] = { 15586887f8eSPeter Barada NET_LAN92XX_GPMC_CONFIG1, 15686887f8eSPeter Barada NET_LAN92XX_GPMC_CONFIG2, 15786887f8eSPeter Barada NET_LAN92XX_GPMC_CONFIG3, 15886887f8eSPeter Barada NET_LAN92XX_GPMC_CONFIG4, 15986887f8eSPeter Barada NET_LAN92XX_GPMC_CONFIG5, 16086887f8eSPeter Barada NET_LAN92XX_GPMC_CONFIG6, 16186887f8eSPeter Barada }; 16286887f8eSPeter Barada 16386887f8eSPeter Barada int board_eth_init(bd_t *bis) 16486887f8eSPeter Barada { 16586887f8eSPeter Barada enable_gpmc_cs_config(gpmc_lan92xx_config, &gpmc_cfg->cs[1], 16686887f8eSPeter Barada CONFIG_SMC911X_BASE, GPMC_SIZE_16M); 16786887f8eSPeter Barada 16886887f8eSPeter Barada return smc911x_initialize(0, CONFIG_SMC911X_BASE); 16986887f8eSPeter Barada } 17086887f8eSPeter Barada #endif 17186887f8eSPeter Barada 17286887f8eSPeter Barada /* 17386887f8eSPeter Barada * IEN - Input Enable 17486887f8eSPeter Barada * IDIS - Input Disable 17586887f8eSPeter Barada * PTD - Pull type Down 17686887f8eSPeter Barada * PTU - Pull type Up 17786887f8eSPeter Barada * DIS - Pull type selection is inactive 17886887f8eSPeter Barada * EN - Pull type selection is active 17986887f8eSPeter Barada * M0 - Mode 0 18086887f8eSPeter Barada * The commented string gives the final mux configuration for that pin 18186887f8eSPeter Barada */ 18286887f8eSPeter Barada 18386887f8eSPeter Barada /* 18486887f8eSPeter Barada * Routine: set_muxconf_regs 18586887f8eSPeter Barada * Description: Setting up the configuration Mux registers specific to the 18686887f8eSPeter Barada * hardware. Many pins need to be moved from protect to primary 18786887f8eSPeter Barada * mode. 18886887f8eSPeter Barada */ 18986887f8eSPeter Barada void set_muxconf_regs(void) 19086887f8eSPeter Barada { 19186887f8eSPeter Barada /*GPMC*/ 19286887f8eSPeter Barada MUX_VAL(CP(GPMC_A1), (IDIS | PTU | EN | M0)); 19386887f8eSPeter Barada MUX_VAL(CP(GPMC_A2), (IDIS | PTU | EN | M0)); 19486887f8eSPeter Barada MUX_VAL(CP(GPMC_A3), (IDIS | PTU | EN | M0)); 19586887f8eSPeter Barada MUX_VAL(CP(GPMC_A4), (IDIS | PTU | EN | M0)); 19686887f8eSPeter Barada MUX_VAL(CP(GPMC_A5), (IDIS | PTU | EN | M0)); 197a8baf8e2SPeter Barada MUX_VAL(CP(GPMC_A6), (IDIS | PTU | EN | M0)); 198a8baf8e2SPeter Barada MUX_VAL(CP(GPMC_A7), (IDIS | PTU | EN | M0)); 199a8baf8e2SPeter Barada MUX_VAL(CP(GPMC_A8), (IDIS | PTU | EN | M0)); 200a8baf8e2SPeter Barada MUX_VAL(CP(GPMC_A9), (IDIS | PTU | EN | M0)); 201a8baf8e2SPeter Barada MUX_VAL(CP(GPMC_A10), (IDIS | PTU | EN | M0)); 202a8baf8e2SPeter Barada MUX_VAL(CP(GPMC_D0), (IEN | PTU | EN | M0)); 203a8baf8e2SPeter Barada MUX_VAL(CP(GPMC_D1), (IEN | PTU | EN | M0)); 204a8baf8e2SPeter Barada MUX_VAL(CP(GPMC_D2), (IEN | PTU | EN | M0)); 205a8baf8e2SPeter Barada MUX_VAL(CP(GPMC_D3), (IEN | PTU | EN | M0)); 206a8baf8e2SPeter Barada MUX_VAL(CP(GPMC_D4), (IEN | PTU | EN | M0)); 207a8baf8e2SPeter Barada MUX_VAL(CP(GPMC_D5), (IEN | PTU | EN | M0)); 208a8baf8e2SPeter Barada MUX_VAL(CP(GPMC_D6), (IEN | PTU | EN | M0)); 209a8baf8e2SPeter Barada MUX_VAL(CP(GPMC_D7), (IEN | PTU | EN | M0)); 21086887f8eSPeter Barada MUX_VAL(CP(GPMC_D8), (IEN | PTU | EN | M0)); 21186887f8eSPeter Barada MUX_VAL(CP(GPMC_D9), (IEN | PTU | EN | M0)); 21286887f8eSPeter Barada MUX_VAL(CP(GPMC_D10), (IEN | PTU | EN | M0)); 21386887f8eSPeter Barada MUX_VAL(CP(GPMC_D11), (IEN | PTU | EN | M0)); 21486887f8eSPeter Barada MUX_VAL(CP(GPMC_D12), (IEN | PTU | EN | M0)); 21586887f8eSPeter Barada MUX_VAL(CP(GPMC_D13), (IEN | PTU | EN | M0)); 21686887f8eSPeter Barada MUX_VAL(CP(GPMC_D14), (IEN | PTU | EN | M0)); 21786887f8eSPeter Barada MUX_VAL(CP(GPMC_D15), (IEN | PTU | EN | M0)); 21886887f8eSPeter Barada MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)); 219a8baf8e2SPeter Barada MUX_VAL(CP(GPMC_NCS1), (IDIS | PTU | EN | M0)); 220a8baf8e2SPeter Barada MUX_VAL(CP(GPMC_NCS2), (IDIS | PTU | EN | M0)); 22186887f8eSPeter Barada MUX_VAL(CP(GPMC_NCS3), (IDIS | PTD | DIS | M0)); 22286887f8eSPeter Barada MUX_VAL(CP(GPMC_NCS5), (IDIS | PTU | DIS | M4)); 22386887f8eSPeter Barada MUX_VAL(CP(GPMC_NCS7), (IDIS | PTD | DIS | M1)); /*GPMC_IO_DIR*/ 22486887f8eSPeter Barada MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTU | EN | M0)); 22586887f8eSPeter Barada MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)); 22686887f8eSPeter Barada 22786887f8eSPeter Barada /*Expansion card */ 22886887f8eSPeter Barada MUX_VAL(CP(MMC1_CLK), (IDIS | PTU | EN | M0)); 22986887f8eSPeter Barada MUX_VAL(CP(MMC1_CMD), (IEN | PTU | EN | M0)); 23086887f8eSPeter Barada MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | EN | M0)); 23186887f8eSPeter Barada MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)); 23286887f8eSPeter Barada MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)); 23386887f8eSPeter Barada MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)); 23486887f8eSPeter Barada 23586887f8eSPeter Barada /* Serial Console */ 23686887f8eSPeter Barada MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)); 23786887f8eSPeter Barada MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M0)); 23886887f8eSPeter Barada MUX_VAL(CP(UART1_CTS), (IEN | PTU | DIS | M0)); 23986887f8eSPeter Barada MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)); 24086887f8eSPeter Barada 24186887f8eSPeter Barada /* I2C */ 24286887f8eSPeter Barada MUX_VAL(CP(I2C2_SCL), (IEN | PTU | EN | M0)); 24386887f8eSPeter Barada MUX_VAL(CP(I2C2_SDA), (IEN | PTU | EN | M0)); 24486887f8eSPeter Barada MUX_VAL(CP(I2C3_SCL), (IEN | PTU | EN | M0)); 24586887f8eSPeter Barada MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M0)); 24686887f8eSPeter Barada 24786887f8eSPeter Barada MUX_VAL(CP(HDQ_SIO), (IEN | PTU | EN | M0)); 24886887f8eSPeter Barada 24986887f8eSPeter Barada /*Control and debug */ 25086887f8eSPeter Barada MUX_VAL(CP(SYS_NIRQ), (IEN | PTU | EN | M0)); 25186887f8eSPeter Barada MUX_VAL(CP(SYS_OFF_MODE), (IEN | PTD | DIS | M0)); 25286887f8eSPeter Barada MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTD | DIS | M0)); 25386887f8eSPeter Barada MUX_VAL(CP(SYS_CLKOUT2), (IEN | PTU | EN | M0)); 254b5ff205cSIgor Grinberg MUX_VAL(CP(JTAG_NTRST), (IEN | PTD | DIS | M0)); 25586887f8eSPeter Barada MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)); 25686887f8eSPeter Barada } 257