186887f8eSPeter Barada /* 286887f8eSPeter Barada * (C) Copyright 2011 386887f8eSPeter Barada * Logic Product Development <www.logicpd.com> 486887f8eSPeter Barada * 586887f8eSPeter Barada * Author : 686887f8eSPeter Barada * Peter Barada <peter.barada@logicpd.com> 786887f8eSPeter Barada * 886887f8eSPeter Barada * Derived from Beagle Board and 3430 SDP code by 986887f8eSPeter Barada * Richard Woodruff <r-woodruff2@ti.com> 1086887f8eSPeter Barada * Syed Mohammed Khasim <khasim@ti.com> 1186887f8eSPeter Barada * 1286887f8eSPeter Barada * See file CREDITS for list of people who contributed to this 1386887f8eSPeter Barada * project. 1486887f8eSPeter Barada * 1586887f8eSPeter Barada * This program is free software; you can redistribute it and/or 1686887f8eSPeter Barada * modify it under the terms of the GNU General Public License as 1786887f8eSPeter Barada * published by the Free Software Foundation; either version 2 of 1886887f8eSPeter Barada * the License, or (at your option) any later version. 1986887f8eSPeter Barada * 2086887f8eSPeter Barada * This program is distributed in the hope that it will be useful, 2186887f8eSPeter Barada * but WITHOUT ANY WARRANTY; without even the implied warranty of 2286887f8eSPeter Barada * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 2386887f8eSPeter Barada * GNU General Public License for more details. 2486887f8eSPeter Barada * 2586887f8eSPeter Barada * You should have received a copy of the GNU General Public License 2686887f8eSPeter Barada * along with this program; if not, write to the Free Software 2786887f8eSPeter Barada * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 2886887f8eSPeter Barada * MA 02111-1307 USA 2986887f8eSPeter Barada */ 3086887f8eSPeter Barada #include <common.h> 3186887f8eSPeter Barada #include <netdev.h> 3286887f8eSPeter Barada #include <flash.h> 3386887f8eSPeter Barada #include <nand.h> 3486887f8eSPeter Barada #include <i2c.h> 3586887f8eSPeter Barada #include <twl4030.h> 3686887f8eSPeter Barada #include <asm/io.h> 3786887f8eSPeter Barada #include <asm/arch/mmc_host_def.h> 3886887f8eSPeter Barada #include <asm/arch/mux.h> 3986887f8eSPeter Barada #include <asm/arch/mem.h> 4086887f8eSPeter Barada #include <asm/arch/sys_proto.h> 4186887f8eSPeter Barada #include <asm/gpio.h> 4286887f8eSPeter Barada #include <asm/mach-types.h> 4386887f8eSPeter Barada #include "omap3logic.h" 4486887f8eSPeter Barada 4586887f8eSPeter Barada DECLARE_GLOBAL_DATA_PTR; 4686887f8eSPeter Barada 4786887f8eSPeter Barada /* 4886887f8eSPeter Barada * two dimensional array of strucures containining board name and Linux 4986887f8eSPeter Barada * machine IDs; row it selected based on CPU column is slected based 5086887f8eSPeter Barada * on hsusb0_data5 pin having a pulldown resistor 5186887f8eSPeter Barada */ 5286887f8eSPeter Barada static struct board_id { 5386887f8eSPeter Barada char *name; 5486887f8eSPeter Barada int machine_id; 5586887f8eSPeter Barada } boards[2][2] = { 5686887f8eSPeter Barada { 5786887f8eSPeter Barada { 5886887f8eSPeter Barada .name = "OMAP35xx SOM LV", 5986887f8eSPeter Barada .machine_id = MACH_TYPE_OMAP3530_LV_SOM, 6086887f8eSPeter Barada }, 6186887f8eSPeter Barada { 6286887f8eSPeter Barada .name = "OMAP35xx Torpedo", 6386887f8eSPeter Barada .machine_id = MACH_TYPE_OMAP3_TORPEDO, 6486887f8eSPeter Barada }, 6586887f8eSPeter Barada }, 6686887f8eSPeter Barada { 6786887f8eSPeter Barada { 6886887f8eSPeter Barada .name = "DM37xx SOM LV", 6986887f8eSPeter Barada .machine_id = MACH_TYPE_DM3730_SOM_LV, 7086887f8eSPeter Barada }, 7186887f8eSPeter Barada { 7286887f8eSPeter Barada .name = "DM37xx Torpedo", 7386887f8eSPeter Barada .machine_id = MACH_TYPE_DM3730_TORPEDO, 7486887f8eSPeter Barada }, 7586887f8eSPeter Barada }, 7686887f8eSPeter Barada }; 7786887f8eSPeter Barada 7886887f8eSPeter Barada /* 7986887f8eSPeter Barada * BOARD_ID_GPIO - GPIO of pin with optional pulldown resistor on SOM LV 8086887f8eSPeter Barada */ 8186887f8eSPeter Barada #define BOARD_ID_GPIO 189 /* hsusb0_data5 pin */ 8286887f8eSPeter Barada 8386887f8eSPeter Barada /* 8486887f8eSPeter Barada * Routine: board_init 8586887f8eSPeter Barada * Description: Early hardware init. 8686887f8eSPeter Barada */ 8786887f8eSPeter Barada int board_init(void) 8886887f8eSPeter Barada { 8986887f8eSPeter Barada struct board_id *board; 9086887f8eSPeter Barada unsigned int val; 9186887f8eSPeter Barada 9286887f8eSPeter Barada gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ 9386887f8eSPeter Barada 9486887f8eSPeter Barada /* boot param addr */ 9586887f8eSPeter Barada gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); 9686887f8eSPeter Barada 9786887f8eSPeter Barada /* 9886887f8eSPeter Barada * To identify between a SOM LV and Torpedo module, 9986887f8eSPeter Barada * a pulldown resistor is on hsusb0_data5 for the SOM LV module. 10086887f8eSPeter Barada * Drive the pin (and let it soak), then read it back. 10186887f8eSPeter Barada * If the pin is still high its a Torpedo. If low its a SOM LV 10286887f8eSPeter Barada */ 10386887f8eSPeter Barada 10486887f8eSPeter Barada /* Mux hsusb0_data5 as a GPIO */ 10586887f8eSPeter Barada MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M4)); 10686887f8eSPeter Barada 10786887f8eSPeter Barada if (gpio_request(BOARD_ID_GPIO, "husb0_data5.gpio_189") == 0) { 10886887f8eSPeter Barada 10986887f8eSPeter Barada /* 11086887f8eSPeter Barada * Drive BOARD_ID_GPIO - the pulldown resistor on the SOM LV 11186887f8eSPeter Barada * will drain the voltage. 11286887f8eSPeter Barada */ 11386887f8eSPeter Barada gpio_direction_output(BOARD_ID_GPIO, 0); 11486887f8eSPeter Barada gpio_set_value(BOARD_ID_GPIO, 1); 11586887f8eSPeter Barada 11686887f8eSPeter Barada /* Let it soak for a bit */ 11786887f8eSPeter Barada sdelay(0x100); 11886887f8eSPeter Barada 11986887f8eSPeter Barada /* 12086887f8eSPeter Barada * Read state of BOARD_ID_GPIO as an input and if its set. 12186887f8eSPeter Barada * If so the board is a Torpedo 12286887f8eSPeter Barada */ 12386887f8eSPeter Barada gpio_direction_input(BOARD_ID_GPIO); 12486887f8eSPeter Barada val = gpio_get_value(BOARD_ID_GPIO); 12586887f8eSPeter Barada gpio_free(BOARD_ID_GPIO); 12686887f8eSPeter Barada 12786887f8eSPeter Barada board = &boards[!!(get_cpu_family() == CPU_OMAP36XX)][!!val]; 12886887f8eSPeter Barada printf("Board: %s\n", board->name); 12986887f8eSPeter Barada 13086887f8eSPeter Barada /* Set the machine_id passed to Linux */ 13186887f8eSPeter Barada gd->bd->bi_arch_number = board->machine_id; 13286887f8eSPeter Barada } 13386887f8eSPeter Barada 13486887f8eSPeter Barada /* restore hsusb0_data5 pin as hsusb0_data5 */ 13586887f8eSPeter Barada MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M0)); 13686887f8eSPeter Barada 13786887f8eSPeter Barada return 0; 13886887f8eSPeter Barada } 13986887f8eSPeter Barada 14086887f8eSPeter Barada #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD) 14186887f8eSPeter Barada int board_mmc_init(bd_t *bis) 14286887f8eSPeter Barada { 14386887f8eSPeter Barada return omap_mmc_init(0); 14486887f8eSPeter Barada } 14586887f8eSPeter Barada #endif 14686887f8eSPeter Barada 14786887f8eSPeter Barada /* 14886887f8eSPeter Barada * Routine: misc_init_r 14986887f8eSPeter Barada * Description: display die ID register 15086887f8eSPeter Barada */ 15186887f8eSPeter Barada int misc_init_r(void) 15286887f8eSPeter Barada { 15386887f8eSPeter Barada dieid_num_r(); 15486887f8eSPeter Barada 15586887f8eSPeter Barada return 0; 15686887f8eSPeter Barada } 15786887f8eSPeter Barada 15886887f8eSPeter Barada #ifdef CONFIG_SMC911X 15986887f8eSPeter Barada /* GPMC CS1 settings for Logic SOM LV/Torpedo LAN92xx Ethernet chip */ 16086887f8eSPeter Barada static const u32 gpmc_lan92xx_config[] = { 16186887f8eSPeter Barada NET_LAN92XX_GPMC_CONFIG1, 16286887f8eSPeter Barada NET_LAN92XX_GPMC_CONFIG2, 16386887f8eSPeter Barada NET_LAN92XX_GPMC_CONFIG3, 16486887f8eSPeter Barada NET_LAN92XX_GPMC_CONFIG4, 16586887f8eSPeter Barada NET_LAN92XX_GPMC_CONFIG5, 16686887f8eSPeter Barada NET_LAN92XX_GPMC_CONFIG6, 16786887f8eSPeter Barada }; 16886887f8eSPeter Barada 16986887f8eSPeter Barada int board_eth_init(bd_t *bis) 17086887f8eSPeter Barada { 17186887f8eSPeter Barada enable_gpmc_cs_config(gpmc_lan92xx_config, &gpmc_cfg->cs[1], 17286887f8eSPeter Barada CONFIG_SMC911X_BASE, GPMC_SIZE_16M); 17386887f8eSPeter Barada 17486887f8eSPeter Barada return smc911x_initialize(0, CONFIG_SMC911X_BASE); 17586887f8eSPeter Barada } 17686887f8eSPeter Barada #endif 17786887f8eSPeter Barada 17886887f8eSPeter Barada /* 17986887f8eSPeter Barada * IEN - Input Enable 18086887f8eSPeter Barada * IDIS - Input Disable 18186887f8eSPeter Barada * PTD - Pull type Down 18286887f8eSPeter Barada * PTU - Pull type Up 18386887f8eSPeter Barada * DIS - Pull type selection is inactive 18486887f8eSPeter Barada * EN - Pull type selection is active 18586887f8eSPeter Barada * M0 - Mode 0 18686887f8eSPeter Barada * The commented string gives the final mux configuration for that pin 18786887f8eSPeter Barada */ 18886887f8eSPeter Barada 18986887f8eSPeter Barada /* 19086887f8eSPeter Barada * Routine: set_muxconf_regs 19186887f8eSPeter Barada * Description: Setting up the configuration Mux registers specific to the 19286887f8eSPeter Barada * hardware. Many pins need to be moved from protect to primary 19386887f8eSPeter Barada * mode. 19486887f8eSPeter Barada */ 19586887f8eSPeter Barada void set_muxconf_regs(void) 19686887f8eSPeter Barada { 19786887f8eSPeter Barada /*GPMC*/ 19886887f8eSPeter Barada MUX_VAL(CP(GPMC_A1), (IDIS | PTU | EN | M0)); 19986887f8eSPeter Barada MUX_VAL(CP(GPMC_A2), (IDIS | PTU | EN | M0)); 20086887f8eSPeter Barada MUX_VAL(CP(GPMC_A3), (IDIS | PTU | EN | M0)); 20186887f8eSPeter Barada MUX_VAL(CP(GPMC_A4), (IDIS | PTU | EN | M0)); 20286887f8eSPeter Barada MUX_VAL(CP(GPMC_A5), (IDIS | PTU | EN | M0)); 203*a8baf8e2SPeter Barada MUX_VAL(CP(GPMC_A6), (IDIS | PTU | EN | M0)); 204*a8baf8e2SPeter Barada MUX_VAL(CP(GPMC_A7), (IDIS | PTU | EN | M0)); 205*a8baf8e2SPeter Barada MUX_VAL(CP(GPMC_A8), (IDIS | PTU | EN | M0)); 206*a8baf8e2SPeter Barada MUX_VAL(CP(GPMC_A9), (IDIS | PTU | EN | M0)); 207*a8baf8e2SPeter Barada MUX_VAL(CP(GPMC_A10), (IDIS | PTU | EN | M0)); 208*a8baf8e2SPeter Barada MUX_VAL(CP(GPMC_D0), (IEN | PTU | EN | M0)); 209*a8baf8e2SPeter Barada MUX_VAL(CP(GPMC_D1), (IEN | PTU | EN | M0)); 210*a8baf8e2SPeter Barada MUX_VAL(CP(GPMC_D2), (IEN | PTU | EN | M0)); 211*a8baf8e2SPeter Barada MUX_VAL(CP(GPMC_D3), (IEN | PTU | EN | M0)); 212*a8baf8e2SPeter Barada MUX_VAL(CP(GPMC_D4), (IEN | PTU | EN | M0)); 213*a8baf8e2SPeter Barada MUX_VAL(CP(GPMC_D5), (IEN | PTU | EN | M0)); 214*a8baf8e2SPeter Barada MUX_VAL(CP(GPMC_D6), (IEN | PTU | EN | M0)); 215*a8baf8e2SPeter Barada MUX_VAL(CP(GPMC_D7), (IEN | PTU | EN | M0)); 21686887f8eSPeter Barada MUX_VAL(CP(GPMC_D8), (IEN | PTU | EN | M0)); 21786887f8eSPeter Barada MUX_VAL(CP(GPMC_D9), (IEN | PTU | EN | M0)); 21886887f8eSPeter Barada MUX_VAL(CP(GPMC_D10), (IEN | PTU | EN | M0)); 21986887f8eSPeter Barada MUX_VAL(CP(GPMC_D11), (IEN | PTU | EN | M0)); 22086887f8eSPeter Barada MUX_VAL(CP(GPMC_D12), (IEN | PTU | EN | M0)); 22186887f8eSPeter Barada MUX_VAL(CP(GPMC_D13), (IEN | PTU | EN | M0)); 22286887f8eSPeter Barada MUX_VAL(CP(GPMC_D14), (IEN | PTU | EN | M0)); 22386887f8eSPeter Barada MUX_VAL(CP(GPMC_D15), (IEN | PTU | EN | M0)); 22486887f8eSPeter Barada MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)); 225*a8baf8e2SPeter Barada MUX_VAL(CP(GPMC_NCS1), (IDIS | PTU | EN | M0)); 226*a8baf8e2SPeter Barada MUX_VAL(CP(GPMC_NCS2), (IDIS | PTU | EN | M0)); 22786887f8eSPeter Barada MUX_VAL(CP(GPMC_NCS3), (IDIS | PTD | DIS | M0)); 22886887f8eSPeter Barada MUX_VAL(CP(GPMC_NCS5), (IDIS | PTU | DIS | M4)); 22986887f8eSPeter Barada MUX_VAL(CP(GPMC_NCS7), (IDIS | PTD | DIS | M1)); /*GPMC_IO_DIR*/ 23086887f8eSPeter Barada MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTU | EN | M0)); 23186887f8eSPeter Barada MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)); 23286887f8eSPeter Barada 23386887f8eSPeter Barada /*Expansion card */ 23486887f8eSPeter Barada MUX_VAL(CP(MMC1_CLK), (IDIS | PTU | EN | M0)); 23586887f8eSPeter Barada MUX_VAL(CP(MMC1_CMD), (IEN | PTU | EN | M0)); 23686887f8eSPeter Barada MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | EN | M0)); 23786887f8eSPeter Barada MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)); 23886887f8eSPeter Barada MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)); 23986887f8eSPeter Barada MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)); 24086887f8eSPeter Barada 24186887f8eSPeter Barada /* Serial Console */ 24286887f8eSPeter Barada MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)); 24386887f8eSPeter Barada MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M0)); 24486887f8eSPeter Barada MUX_VAL(CP(UART1_CTS), (IEN | PTU | DIS | M0)); 24586887f8eSPeter Barada MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)); 24686887f8eSPeter Barada 24786887f8eSPeter Barada /* I2C */ 24886887f8eSPeter Barada MUX_VAL(CP(I2C2_SCL), (IEN | PTU | EN | M0)); 24986887f8eSPeter Barada MUX_VAL(CP(I2C2_SDA), (IEN | PTU | EN | M0)); 25086887f8eSPeter Barada MUX_VAL(CP(I2C3_SCL), (IEN | PTU | EN | M0)); 25186887f8eSPeter Barada MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M0)); 25286887f8eSPeter Barada 25386887f8eSPeter Barada MUX_VAL(CP(HDQ_SIO), (IEN | PTU | EN | M0)); 25486887f8eSPeter Barada 25586887f8eSPeter Barada /*Control and debug */ 25686887f8eSPeter Barada MUX_VAL(CP(SYS_NIRQ), (IEN | PTU | EN | M0)); 25786887f8eSPeter Barada MUX_VAL(CP(SYS_OFF_MODE), (IEN | PTD | DIS | M0)); 25886887f8eSPeter Barada MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTD | DIS | M0)); 25986887f8eSPeter Barada MUX_VAL(CP(SYS_CLKOUT2), (IEN | PTU | EN | M0)); 26086887f8eSPeter Barada MUX_VAL(CP(JTAG_nTRST), (IEN | PTD | DIS | M0)); 26186887f8eSPeter Barada MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)); 26286887f8eSPeter Barada } 263