1*86887f8eSPeter Barada /* 2*86887f8eSPeter Barada * (C) Copyright 2011 3*86887f8eSPeter Barada * Logic Product Development <www.logicpd.com> 4*86887f8eSPeter Barada * 5*86887f8eSPeter Barada * Author : 6*86887f8eSPeter Barada * Peter Barada <peter.barada@logicpd.com> 7*86887f8eSPeter Barada * 8*86887f8eSPeter Barada * Derived from Beagle Board and 3430 SDP code by 9*86887f8eSPeter Barada * Richard Woodruff <r-woodruff2@ti.com> 10*86887f8eSPeter Barada * Syed Mohammed Khasim <khasim@ti.com> 11*86887f8eSPeter Barada * 12*86887f8eSPeter Barada * See file CREDITS for list of people who contributed to this 13*86887f8eSPeter Barada * project. 14*86887f8eSPeter Barada * 15*86887f8eSPeter Barada * This program is free software; you can redistribute it and/or 16*86887f8eSPeter Barada * modify it under the terms of the GNU General Public License as 17*86887f8eSPeter Barada * published by the Free Software Foundation; either version 2 of 18*86887f8eSPeter Barada * the License, or (at your option) any later version. 19*86887f8eSPeter Barada * 20*86887f8eSPeter Barada * This program is distributed in the hope that it will be useful, 21*86887f8eSPeter Barada * but WITHOUT ANY WARRANTY; without even the implied warranty of 22*86887f8eSPeter Barada * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 23*86887f8eSPeter Barada * GNU General Public License for more details. 24*86887f8eSPeter Barada * 25*86887f8eSPeter Barada * You should have received a copy of the GNU General Public License 26*86887f8eSPeter Barada * along with this program; if not, write to the Free Software 27*86887f8eSPeter Barada * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 28*86887f8eSPeter Barada * MA 02111-1307 USA 29*86887f8eSPeter Barada */ 30*86887f8eSPeter Barada #include <common.h> 31*86887f8eSPeter Barada #include <netdev.h> 32*86887f8eSPeter Barada #include <flash.h> 33*86887f8eSPeter Barada #include <nand.h> 34*86887f8eSPeter Barada #include <i2c.h> 35*86887f8eSPeter Barada #include <twl4030.h> 36*86887f8eSPeter Barada #include <asm/io.h> 37*86887f8eSPeter Barada #include <asm/arch/mmc_host_def.h> 38*86887f8eSPeter Barada #include <asm/arch/mux.h> 39*86887f8eSPeter Barada #include <asm/arch/mem.h> 40*86887f8eSPeter Barada #include <asm/arch/sys_proto.h> 41*86887f8eSPeter Barada #include <asm/gpio.h> 42*86887f8eSPeter Barada #include <asm/mach-types.h> 43*86887f8eSPeter Barada #include "omap3logic.h" 44*86887f8eSPeter Barada 45*86887f8eSPeter Barada DECLARE_GLOBAL_DATA_PTR; 46*86887f8eSPeter Barada 47*86887f8eSPeter Barada /* 48*86887f8eSPeter Barada * two dimensional array of strucures containining board name and Linux 49*86887f8eSPeter Barada * machine IDs; row it selected based on CPU column is slected based 50*86887f8eSPeter Barada * on hsusb0_data5 pin having a pulldown resistor 51*86887f8eSPeter Barada */ 52*86887f8eSPeter Barada static struct board_id { 53*86887f8eSPeter Barada char *name; 54*86887f8eSPeter Barada int machine_id; 55*86887f8eSPeter Barada } boards[2][2] = { 56*86887f8eSPeter Barada { 57*86887f8eSPeter Barada { 58*86887f8eSPeter Barada .name = "OMAP35xx SOM LV", 59*86887f8eSPeter Barada .machine_id = MACH_TYPE_OMAP3530_LV_SOM, 60*86887f8eSPeter Barada }, 61*86887f8eSPeter Barada { 62*86887f8eSPeter Barada .name = "OMAP35xx Torpedo", 63*86887f8eSPeter Barada .machine_id = MACH_TYPE_OMAP3_TORPEDO, 64*86887f8eSPeter Barada }, 65*86887f8eSPeter Barada }, 66*86887f8eSPeter Barada { 67*86887f8eSPeter Barada { 68*86887f8eSPeter Barada .name = "DM37xx SOM LV", 69*86887f8eSPeter Barada .machine_id = MACH_TYPE_DM3730_SOM_LV, 70*86887f8eSPeter Barada }, 71*86887f8eSPeter Barada { 72*86887f8eSPeter Barada .name = "DM37xx Torpedo", 73*86887f8eSPeter Barada .machine_id = MACH_TYPE_DM3730_TORPEDO, 74*86887f8eSPeter Barada }, 75*86887f8eSPeter Barada }, 76*86887f8eSPeter Barada }; 77*86887f8eSPeter Barada 78*86887f8eSPeter Barada /* 79*86887f8eSPeter Barada * BOARD_ID_GPIO - GPIO of pin with optional pulldown resistor on SOM LV 80*86887f8eSPeter Barada */ 81*86887f8eSPeter Barada #define BOARD_ID_GPIO 189 /* hsusb0_data5 pin */ 82*86887f8eSPeter Barada 83*86887f8eSPeter Barada /* 84*86887f8eSPeter Barada * Routine: board_init 85*86887f8eSPeter Barada * Description: Early hardware init. 86*86887f8eSPeter Barada */ 87*86887f8eSPeter Barada int board_init(void) 88*86887f8eSPeter Barada { 89*86887f8eSPeter Barada struct board_id *board; 90*86887f8eSPeter Barada unsigned int val; 91*86887f8eSPeter Barada 92*86887f8eSPeter Barada gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ 93*86887f8eSPeter Barada 94*86887f8eSPeter Barada /* boot param addr */ 95*86887f8eSPeter Barada gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); 96*86887f8eSPeter Barada 97*86887f8eSPeter Barada /* 98*86887f8eSPeter Barada * To identify between a SOM LV and Torpedo module, 99*86887f8eSPeter Barada * a pulldown resistor is on hsusb0_data5 for the SOM LV module. 100*86887f8eSPeter Barada * Drive the pin (and let it soak), then read it back. 101*86887f8eSPeter Barada * If the pin is still high its a Torpedo. If low its a SOM LV 102*86887f8eSPeter Barada */ 103*86887f8eSPeter Barada 104*86887f8eSPeter Barada /* Mux hsusb0_data5 as a GPIO */ 105*86887f8eSPeter Barada MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M4)); 106*86887f8eSPeter Barada 107*86887f8eSPeter Barada if (gpio_request(BOARD_ID_GPIO, "husb0_data5.gpio_189") == 0) { 108*86887f8eSPeter Barada 109*86887f8eSPeter Barada /* 110*86887f8eSPeter Barada * Drive BOARD_ID_GPIO - the pulldown resistor on the SOM LV 111*86887f8eSPeter Barada * will drain the voltage. 112*86887f8eSPeter Barada */ 113*86887f8eSPeter Barada gpio_direction_output(BOARD_ID_GPIO, 0); 114*86887f8eSPeter Barada gpio_set_value(BOARD_ID_GPIO, 1); 115*86887f8eSPeter Barada 116*86887f8eSPeter Barada /* Let it soak for a bit */ 117*86887f8eSPeter Barada sdelay(0x100); 118*86887f8eSPeter Barada 119*86887f8eSPeter Barada /* 120*86887f8eSPeter Barada * Read state of BOARD_ID_GPIO as an input and if its set. 121*86887f8eSPeter Barada * If so the board is a Torpedo 122*86887f8eSPeter Barada */ 123*86887f8eSPeter Barada gpio_direction_input(BOARD_ID_GPIO); 124*86887f8eSPeter Barada val = gpio_get_value(BOARD_ID_GPIO); 125*86887f8eSPeter Barada gpio_free(BOARD_ID_GPIO); 126*86887f8eSPeter Barada 127*86887f8eSPeter Barada board = &boards[!!(get_cpu_family() == CPU_OMAP36XX)][!!val]; 128*86887f8eSPeter Barada printf("Board: %s\n", board->name); 129*86887f8eSPeter Barada 130*86887f8eSPeter Barada /* Set the machine_id passed to Linux */ 131*86887f8eSPeter Barada gd->bd->bi_arch_number = board->machine_id; 132*86887f8eSPeter Barada } 133*86887f8eSPeter Barada 134*86887f8eSPeter Barada /* restore hsusb0_data5 pin as hsusb0_data5 */ 135*86887f8eSPeter Barada MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M0)); 136*86887f8eSPeter Barada 137*86887f8eSPeter Barada return 0; 138*86887f8eSPeter Barada } 139*86887f8eSPeter Barada 140*86887f8eSPeter Barada #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD) 141*86887f8eSPeter Barada int board_mmc_init(bd_t *bis) 142*86887f8eSPeter Barada { 143*86887f8eSPeter Barada return omap_mmc_init(0); 144*86887f8eSPeter Barada } 145*86887f8eSPeter Barada #endif 146*86887f8eSPeter Barada 147*86887f8eSPeter Barada /* 148*86887f8eSPeter Barada * Routine: misc_init_r 149*86887f8eSPeter Barada * Description: display die ID register 150*86887f8eSPeter Barada */ 151*86887f8eSPeter Barada int misc_init_r(void) 152*86887f8eSPeter Barada { 153*86887f8eSPeter Barada dieid_num_r(); 154*86887f8eSPeter Barada 155*86887f8eSPeter Barada return 0; 156*86887f8eSPeter Barada } 157*86887f8eSPeter Barada 158*86887f8eSPeter Barada #ifdef CONFIG_SMC911X 159*86887f8eSPeter Barada /* GPMC CS1 settings for Logic SOM LV/Torpedo LAN92xx Ethernet chip */ 160*86887f8eSPeter Barada static const u32 gpmc_lan92xx_config[] = { 161*86887f8eSPeter Barada NET_LAN92XX_GPMC_CONFIG1, 162*86887f8eSPeter Barada NET_LAN92XX_GPMC_CONFIG2, 163*86887f8eSPeter Barada NET_LAN92XX_GPMC_CONFIG3, 164*86887f8eSPeter Barada NET_LAN92XX_GPMC_CONFIG4, 165*86887f8eSPeter Barada NET_LAN92XX_GPMC_CONFIG5, 166*86887f8eSPeter Barada NET_LAN92XX_GPMC_CONFIG6, 167*86887f8eSPeter Barada }; 168*86887f8eSPeter Barada 169*86887f8eSPeter Barada int board_eth_init(bd_t *bis) 170*86887f8eSPeter Barada { 171*86887f8eSPeter Barada enable_gpmc_cs_config(gpmc_lan92xx_config, &gpmc_cfg->cs[1], 172*86887f8eSPeter Barada CONFIG_SMC911X_BASE, GPMC_SIZE_16M); 173*86887f8eSPeter Barada 174*86887f8eSPeter Barada return smc911x_initialize(0, CONFIG_SMC911X_BASE); 175*86887f8eSPeter Barada } 176*86887f8eSPeter Barada #endif 177*86887f8eSPeter Barada 178*86887f8eSPeter Barada /* 179*86887f8eSPeter Barada * IEN - Input Enable 180*86887f8eSPeter Barada * IDIS - Input Disable 181*86887f8eSPeter Barada * PTD - Pull type Down 182*86887f8eSPeter Barada * PTU - Pull type Up 183*86887f8eSPeter Barada * DIS - Pull type selection is inactive 184*86887f8eSPeter Barada * EN - Pull type selection is active 185*86887f8eSPeter Barada * M0 - Mode 0 186*86887f8eSPeter Barada * The commented string gives the final mux configuration for that pin 187*86887f8eSPeter Barada */ 188*86887f8eSPeter Barada 189*86887f8eSPeter Barada /* 190*86887f8eSPeter Barada * Routine: set_muxconf_regs 191*86887f8eSPeter Barada * Description: Setting up the configuration Mux registers specific to the 192*86887f8eSPeter Barada * hardware. Many pins need to be moved from protect to primary 193*86887f8eSPeter Barada * mode. 194*86887f8eSPeter Barada */ 195*86887f8eSPeter Barada void set_muxconf_regs(void) 196*86887f8eSPeter Barada { 197*86887f8eSPeter Barada /*GPMC*/ 198*86887f8eSPeter Barada MUX_VAL(CP(GPMC_A1), (IDIS | PTU | EN | M0)); 199*86887f8eSPeter Barada MUX_VAL(CP(GPMC_A2), (IDIS | PTU | EN | M0)); 200*86887f8eSPeter Barada MUX_VAL(CP(GPMC_A3), (IDIS | PTU | EN | M0)); 201*86887f8eSPeter Barada MUX_VAL(CP(GPMC_A4), (IDIS | PTU | EN | M0)); 202*86887f8eSPeter Barada MUX_VAL(CP(GPMC_A5), (IDIS | PTU | EN | M0)); 203*86887f8eSPeter Barada MUX_VAL(CP(GPMC_D8), (IEN | PTU | EN | M0)); 204*86887f8eSPeter Barada MUX_VAL(CP(GPMC_D9), (IEN | PTU | EN | M0)); 205*86887f8eSPeter Barada MUX_VAL(CP(GPMC_D10), (IEN | PTU | EN | M0)); 206*86887f8eSPeter Barada MUX_VAL(CP(GPMC_D11), (IEN | PTU | EN | M0)); 207*86887f8eSPeter Barada MUX_VAL(CP(GPMC_D12), (IEN | PTU | EN | M0)); 208*86887f8eSPeter Barada MUX_VAL(CP(GPMC_D13), (IEN | PTU | EN | M0)); 209*86887f8eSPeter Barada MUX_VAL(CP(GPMC_D14), (IEN | PTU | EN | M0)); 210*86887f8eSPeter Barada MUX_VAL(CP(GPMC_D15), (IEN | PTU | EN | M0)); 211*86887f8eSPeter Barada MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)); 212*86887f8eSPeter Barada MUX_VAL(CP(GPMC_NCS3), (IDIS | PTD | DIS | M0)); 213*86887f8eSPeter Barada MUX_VAL(CP(GPMC_NCS5), (IDIS | PTU | DIS | M4)); 214*86887f8eSPeter Barada MUX_VAL(CP(GPMC_NCS7), (IDIS | PTD | DIS | M1)); /*GPMC_IO_DIR*/ 215*86887f8eSPeter Barada MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTU | EN | M0)); 216*86887f8eSPeter Barada MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)); 217*86887f8eSPeter Barada 218*86887f8eSPeter Barada /*Expansion card */ 219*86887f8eSPeter Barada MUX_VAL(CP(MMC1_CLK), (IDIS | PTU | EN | M0)); 220*86887f8eSPeter Barada MUX_VAL(CP(MMC1_CMD), (IEN | PTU | EN | M0)); 221*86887f8eSPeter Barada MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | EN | M0)); 222*86887f8eSPeter Barada MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)); 223*86887f8eSPeter Barada MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)); 224*86887f8eSPeter Barada MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)); 225*86887f8eSPeter Barada 226*86887f8eSPeter Barada /* Serial Console */ 227*86887f8eSPeter Barada MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)); 228*86887f8eSPeter Barada MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M0)); 229*86887f8eSPeter Barada MUX_VAL(CP(UART1_CTS), (IEN | PTU | DIS | M0)); 230*86887f8eSPeter Barada MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)); 231*86887f8eSPeter Barada 232*86887f8eSPeter Barada /* I2C */ 233*86887f8eSPeter Barada MUX_VAL(CP(I2C2_SCL), (IEN | PTU | EN | M0)); 234*86887f8eSPeter Barada MUX_VAL(CP(I2C2_SDA), (IEN | PTU | EN | M0)); 235*86887f8eSPeter Barada MUX_VAL(CP(I2C3_SCL), (IEN | PTU | EN | M0)); 236*86887f8eSPeter Barada MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M0)); 237*86887f8eSPeter Barada 238*86887f8eSPeter Barada MUX_VAL(CP(HDQ_SIO), (IEN | PTU | EN | M0)); 239*86887f8eSPeter Barada 240*86887f8eSPeter Barada /*Control and debug */ 241*86887f8eSPeter Barada MUX_VAL(CP(SYS_NIRQ), (IEN | PTU | EN | M0)); 242*86887f8eSPeter Barada MUX_VAL(CP(SYS_OFF_MODE), (IEN | PTD | DIS | M0)); 243*86887f8eSPeter Barada MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTD | DIS | M0)); 244*86887f8eSPeter Barada MUX_VAL(CP(SYS_CLKOUT2), (IEN | PTU | EN | M0)); 245*86887f8eSPeter Barada MUX_VAL(CP(JTAG_nTRST), (IEN | PTD | DIS | M0)); 246*86887f8eSPeter Barada MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)); 247*86887f8eSPeter Barada } 248